Search

Long Pham

Examiner (ID: 16756, Phone: (571)272-1714 , Office: P/2814 )

Most Active Art Unit
2814
Art Unit(s)
2899, 2897, 1107, 2814, 1763, 2812, 2822, 2823
Total Applications
3709
Issued Applications
3257
Pending Applications
178
Abandoned Applications
335

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9180193 [patent_doc_number] => 20130322178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-05 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/840689 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 8610 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13840689 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/840689
SEMICONDUCTOR MEMORY DEVICE Mar 14, 2013 Abandoned
Array ( [id] => 10617897 [patent_doc_number] => 09337350 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-10 [patent_title] => 'Transistor with reduced parasitic capacitance and access resistance of the source and drain, and method of fabrication of the same' [patent_app_type] => utility [patent_app_number] => 13/727104 [patent_app_country] => US [patent_app_date] => 2012-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 8593 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13727104 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/727104
Transistor with reduced parasitic capacitance and access resistance of the source and drain, and method of fabrication of the same Dec 25, 2012 Issued
Array ( [id] => 8682886 [patent_doc_number] => 20130051170 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/662147 [patent_app_country] => US [patent_app_date] => 2012-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6178 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13662147 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/662147
SEMICONDUCTOR MEMORY DEVICE Oct 25, 2012 Abandoned
Array ( [id] => 8392241 [patent_doc_number] => 20120230088 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-13 [patent_title] => '8T SRAM Cell With One Word Line' [patent_app_type] => utility [patent_app_number] => 13/476672 [patent_app_country] => US [patent_app_date] => 2012-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7499 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13476672 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/476672
8T SRAM Cell With One Word Line May 20, 2012 Abandoned
Array ( [id] => 8743885 [patent_doc_number] => 20130083602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/459671 [patent_app_country] => US [patent_app_date] => 2012-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5686 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13459671 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/459671
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE Apr 29, 2012 Abandoned
Array ( [id] => 8346045 [patent_doc_number] => 20120206962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'METHOD OF HANDLING REFERENCE CELLS IN NVM ARRAYS' [patent_app_type] => utility [patent_app_number] => 13/438858 [patent_app_country] => US [patent_app_date] => 2012-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3711 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13438858 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/438858
METHOD OF HANDLING REFERENCE CELLS IN NVM ARRAYS Apr 3, 2012 Abandoned
Array ( [id] => 8719329 [patent_doc_number] => 20130070546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-21 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/423759 [patent_app_country] => US [patent_app_date] => 2012-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4744 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13423759 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/423759
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE Mar 18, 2012 Abandoned
Array ( [id] => 8564203 [patent_doc_number] => 20120326775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-27 [patent_title] => 'CHIP SELECT CIRCUIT AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/340900 [patent_app_country] => US [patent_app_date] => 2011-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2941 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13340900 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/340900
CHIP SELECT CIRCUIT AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME Dec 29, 2011 Abandoned
Array ( [id] => 8219424 [patent_doc_number] => 20120134198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-31 [patent_title] => 'MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/306175 [patent_app_country] => US [patent_app_date] => 2011-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6202 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13306175 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/306175
MEMORY SYSTEM Nov 28, 2011 Abandoned
Array ( [id] => 8813287 [patent_doc_number] => 20130114332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'REDUCING READ DISTURBS AND WRITE FAILS IN A DATA STORAGE CELL' [patent_app_type] => utility [patent_app_number] => 13/288293 [patent_app_country] => US [patent_app_date] => 2011-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5149 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13288293 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/288293
REDUCING READ DISTURBS AND WRITE FAILS IN A DATA STORAGE CELL Nov 2, 2011 Abandoned
Array ( [id] => 8743874 [patent_doc_number] => 20130083591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'Alternating Wordline Connection in 8T Cells for Improving Resiliency to Multi-Bit SER Upsets' [patent_app_type] => utility [patent_app_number] => 13/248699 [patent_app_country] => US [patent_app_date] => 2011-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7207 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13248699 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/248699
Alternating Wordline Connection in 8T Cells for Improving Resiliency to Multi-Bit SER Upsets Sep 28, 2011 Abandoned
Array ( [id] => 7708878 [patent_doc_number] => 20120002485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/233789 [patent_app_country] => US [patent_app_date] => 2011-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5804 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13233789 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/233789
SEMICONDUCTOR MEMORY DEVICE Sep 14, 2011 Abandoned
Array ( [id] => 8515066 [patent_doc_number] => 20120314474 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-13 [patent_title] => 'NON-VOLATILE MEMORY CELL STRUCTURE AND METHOD FOR PROGRAMMING AND READING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/157295 [patent_app_country] => US [patent_app_date] => 2011-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7006 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13157295 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/157295
NON-VOLATILE MEMORY CELL STRUCTURE AND METHOD FOR PROGRAMMING AND READING THE SAME Jun 8, 2011 Abandoned
Array ( [id] => 7498174 [patent_doc_number] => 20110261614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-27 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/064717 [patent_app_country] => US [patent_app_date] => 2011-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 15364 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0261/20110261614.pdf [firstpage_image] =>[orig_patent_app_number] => 13064717 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/064717
Semiconductor device Apr 10, 2011 Abandoned
Array ( [id] => 6351724 [patent_doc_number] => 20100072453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-25 [patent_title] => 'Phase-Changeable Fuse Elements and Memory Devices Containing Phase-Changeable Fuse Elements and Memory Cells Therein' [patent_app_type] => utility [patent_app_number] => 12/492275 [patent_app_country] => US [patent_app_date] => 2009-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 12726 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20100072453.pdf [firstpage_image] =>[orig_patent_app_number] => 12492275 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/492275
Phase-Changeable Fuse Elements and Memory Devices Containing Phase-Changeable Fuse Elements and Memory Cells Therein Jun 25, 2009 Abandoned
Array ( [id] => 6289647 [patent_doc_number] => 20100238743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'FAST EMBEDDED BiCMOS-THYRISTOR LATCH-UP NONVOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 12/408721 [patent_app_country] => US [patent_app_date] => 2009-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 855 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20100238743.pdf [firstpage_image] =>[orig_patent_app_number] => 12408721 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/408721
FAST EMBEDDED BiCMOS-THYRISTOR LATCH-UP NONVOLATILE MEMORY Mar 22, 2009 Abandoned
Array ( [id] => 5549753 [patent_doc_number] => 20090283739 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-19 [patent_title] => 'NONVOLATILE STORAGE DEVICE AND METHOD FOR MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 12/408598 [patent_app_country] => US [patent_app_date] => 2009-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 20279 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0283/20090283739.pdf [firstpage_image] =>[orig_patent_app_number] => 12408598 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/408598
NONVOLATILE STORAGE DEVICE AND METHOD FOR MANUFACTURING SAME Mar 19, 2009 Abandoned
Array ( [id] => 5531530 [patent_doc_number] => 20090231318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-17 [patent_title] => 'COLUMN SELECT SIGNAL ADJUSTING CIRCUIT CAPABLE OF REDUCING INTERFERENCE BETWEEN BIT LINES AND DATA LINES AND SEMICONDUCTOR MEMORY DEVICE HAVING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/337509 [patent_app_country] => US [patent_app_date] => 2008-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3347 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20090231318.pdf [firstpage_image] =>[orig_patent_app_number] => 12337509 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/337509
COLUMN SELECT SIGNAL ADJUSTING CIRCUIT CAPABLE OF REDUCING INTERFERENCE BETWEEN BIT LINES AND DATA LINES AND SEMICONDUCTOR MEMORY DEVICE HAVING THE SAME Dec 16, 2008 Abandoned
12/171183 Radiation Sensors and Single-Event-Effects Suppression Devices Jul 9, 2008 Abandoned
Array ( [id] => 5426337 [patent_doc_number] => 20090085647 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-02 [patent_title] => 'STORAGE APPARATUS FOR USING ADAPTIVE CLOCK TO TEMPERATURE CHANGE AND BROADCAST RECEIVING APPARATUS USING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/050459 [patent_app_country] => US [patent_app_date] => 2008-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3826 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20090085647.pdf [firstpage_image] =>[orig_patent_app_number] => 12050459 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/050459
STORAGE APPARATUS FOR USING ADAPTIVE CLOCK TO TEMPERATURE CHANGE AND BROADCAST RECEIVING APPARATUS USING THE SAME Mar 17, 2008 Abandoned
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