Long Pham

Array ( [id] => 16081007 [patent_doc_number] => 20200194490 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => HIGH EFFICIENCY WIDE SPECTRUM SENSOR [patent_app_type] => utility [patent_app_number] => 16/801946 [patent_app_country] => US [patent_app_date] => 2020-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8881 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16801946 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16332353 [patent_doc_number] => 20200303319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => ISOLATED TRANSFORMER WITH INTEGRATED SHIELD TOPOLOGY FOR REDUCED EMI [patent_app_type] => utility [patent_app_number] => 16/800043 [patent_app_country] => US [patent_app_date] => 2020-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8171 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16800043 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16080761 [patent_doc_number] => 20200194367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => MEMORY AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/799219 [patent_app_country] => US [patent_app_date] => 2020-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3562 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16799219 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17051284 [patent_doc_number] => 20210260718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-26 [patent_title] => CHEMICAL MECHANICAL POLISHING USING FLUORESCENCE-BASED ENDPOINT DETECTION [patent_app_type] => utility [patent_app_number] => 16/797925 [patent_app_country] => US [patent_app_date] => 2020-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6641 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16797925 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17566729 [patent_doc_number] => 20220130878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => DIODE ARRAY, ARRANGEMENT, AND SYSTEM [patent_app_type] => utility [patent_app_number] => 17/432800 [patent_app_country] => US [patent_app_date] => 2020-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6323 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17432800 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17758125 [patent_doc_number] => 11398424 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-26 [patent_title] => Semiconductor package structure [patent_app_type] => utility [patent_app_number] => 16/793989 [patent_app_country] => US [patent_app_date] => 2020-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 51 [patent_no_of_words] => 7126 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16793989 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16854050 [patent_doc_number] => 20210154795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-27 [patent_title] => POLISHING HEAD FOR USE IN CHEMICAL MECHANICAL POLISHING AND CMP APPARATUS HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 16/788098 [patent_app_country] => US [patent_app_date] => 2020-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4108 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16788098 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16001197 [patent_doc_number] => 20200176469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/780935 [patent_app_country] => US [patent_app_date] => 2020-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6819 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16780935 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15969963 [patent_doc_number] => 20200168733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => HIGH VOLTAGE LATERAL JUNCTION DIODE DEVICE [patent_app_type] => utility [patent_app_number] => 16/776544 [patent_app_country] => US [patent_app_date] => 2020-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4615 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16776544 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17745709 [patent_doc_number] => 11393791 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-19 [patent_title] => Three-dimensional stacking semiconductor assemblies with near zero bond line thickness [patent_app_type] => utility [patent_app_number] => 16/774900 [patent_app_country] => US [patent_app_date] => 2020-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 29 [patent_no_of_words] => 6666 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16774900 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15969663 [patent_doc_number] => 20200168583 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => SEMICONDUCTOR DEVICE PACKAGE INCLUDING EMBEDDED CONDUCTIVE ELEMENTS [patent_app_type] => utility [patent_app_number] => 16/774983 [patent_app_country] => US [patent_app_date] => 2020-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5528 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16774983 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15939133 [patent_doc_number] => 20200161200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/751139 [patent_app_country] => US [patent_app_date] => 2020-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6179 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16751139 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15939079 [patent_doc_number] => 20200161173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => CONTACT FORMATION METHOD AND RELATED STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/751136 [patent_app_country] => US [patent_app_date] => 2020-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11414 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16751136 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17862899 [patent_doc_number] => 11444060 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-13 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 16/742341 [patent_app_country] => US [patent_app_date] => 2020-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 7497 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16742341 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15906085 [patent_doc_number] => 20200152563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/742424 [patent_app_country] => US [patent_app_date] => 2020-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11006 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16742424 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17500723 [patent_doc_number] => 11289433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-29 [patent_title] => Semiconductor device packages and methods of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/740168 [patent_app_country] => US [patent_app_date] => 2020-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 26 [patent_no_of_words] => 5866 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16740168 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17878571 [patent_doc_number] => 11450595 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-20 [patent_title] => Semiconductor package device with integrated inductor and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/727930 [patent_app_country] => US [patent_app_date] => 2019-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6737 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16727930 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16920453 [patent_doc_number] => 20210193545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => SEMICONDUCTOR PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/725307 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4956 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16725307 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15840653 [patent_doc_number] => 20200135609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => CIRCUIT BOARD AND PACKAGED CHIP [patent_app_type] => utility [patent_app_number] => 16/725511 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2435 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16725511 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15841285 [patent_doc_number] => 20200135925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => METHOD FOR FORMING STRESSOR, SEMICONDUCTOR DEVICE HAVING STRESSOR, AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/725501 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6918 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16725501 [rel_patent_id] =>[rel_patent_doc_number] =>)