Search

Long Pham

Examiner (ID: 5269, Phone: (571)272-1714 , Office: P/2814 )

Most Active Art Unit
2814
Art Unit(s)
2822, 2899, 2897, 2823, 1107, 2814, 2812, 1763
Total Applications
3774
Issued Applications
3306
Pending Applications
160
Abandoned Applications
335

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16755900 [patent_doc_number] => 10974433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-13 [patent_title] => Gate-all-around fin device [patent_app_type] => utility [patent_app_number] => 16/460346 [patent_app_country] => US [patent_app_date] => 2019-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3457 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16460346 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/460346
Gate-all-around fin device Jul 1, 2019 Issued
Array ( [id] => 17032786 [patent_doc_number] => 11094604 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-17 [patent_title] => System and method to enhance solder joint reliability [patent_app_type] => utility [patent_app_number] => 16/455660 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 26 [patent_no_of_words] => 14161 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16455660 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/455660
System and method to enhance solder joint reliability Jun 26, 2019 Issued
Array ( [id] => 17148845 [patent_doc_number] => 11141902 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-12 [patent_title] => Gate-all-around fin device [patent_app_type] => utility [patent_app_number] => 16/452836 [patent_app_country] => US [patent_app_date] => 2019-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3463 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16452836 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/452836
Gate-all-around fin device Jun 25, 2019 Issued
Array ( [id] => 17119155 [patent_doc_number] => 11130270 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-28 [patent_title] => Gate-all-around fin device [patent_app_type] => utility [patent_app_number] => 16/452072 [patent_app_country] => US [patent_app_date] => 2019-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3457 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16452072 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/452072
Gate-all-around fin device Jun 24, 2019 Issued
Array ( [id] => 17395912 [patent_doc_number] => 11244936 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-08 [patent_title] => Semiconductor device package and apparatus comprising the same [patent_app_type] => utility [patent_app_number] => 16/439409 [patent_app_country] => US [patent_app_date] => 2019-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 46 [patent_no_of_words] => 10612 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16439409 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/439409
Semiconductor device package and apparatus comprising the same Jun 11, 2019 Issued
Array ( [id] => 14904685 [patent_doc_number] => 20190296108 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => SEMICONDUCTOR DEVICE WITH RECESSED SOURCE/DRAIN CONTACTS AND A GATE CONTACT POSITIONED ABOVE THE ACTIVE REGION [patent_app_type] => utility [patent_app_number] => 16/437440 [patent_app_country] => US [patent_app_date] => 2019-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4727 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16437440 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/437440
Semiconductor device with recessed source/drain contacts and a gate contact positioned above the active region Jun 10, 2019 Issued
Array ( [id] => 17077923 [patent_doc_number] => 11114338 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-07 [patent_title] => Fully aligned via in ground rule region [patent_app_type] => utility [patent_app_number] => 16/436117 [patent_app_country] => US [patent_app_date] => 2019-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3479 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16436117 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/436117
Fully aligned via in ground rule region Jun 9, 2019 Issued
Array ( [id] => 16896391 [patent_doc_number] => 11037953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Semiconductor device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/432629 [patent_app_country] => US [patent_app_date] => 2019-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 7665 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16432629 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/432629
Semiconductor device and method of manufacturing the same Jun 4, 2019 Issued
Array ( [id] => 16904884 [patent_doc_number] => 20210183800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => Method for Temporarily Fastening a Semiconductor Chip to a Surface, Method for Producing a Semiconductor Component and Semiconductor Component [patent_app_type] => utility [patent_app_number] => 17/057036 [patent_app_country] => US [patent_app_date] => 2019-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4457 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17057036 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/057036
Method for temporarily fastening a semiconductor chip to a surface, method for producing a semiconductor component and semiconductor component Jun 2, 2019 Issued
Array ( [id] => 17122235 [patent_doc_number] => 11133380 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-28 [patent_title] => Diode structure of a power semiconductor device [patent_app_type] => utility [patent_app_number] => 16/429476 [patent_app_country] => US [patent_app_date] => 2019-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 10211 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16429476 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/429476
Diode structure of a power semiconductor device Jun 2, 2019 Issued
Array ( [id] => 15303553 [patent_doc_number] => 20190394912 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => OVERMOLDED ELECTRONIC MODULE WITH AN INTEGRATED ELECTROMAGNETIC SHIELD USING SMT SHIELD WALL COMPONENTS [patent_app_type] => utility [patent_app_number] => 16/428081 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3789 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16428081 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/428081
Overmolded electronic module with an integrated electromagnetic shield using SMT shield wall components May 30, 2019 Issued
Array ( [id] => 16699915 [patent_doc_number] => 10950523 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-16 [patent_title] => Semiconductor devices having through electrodes and methods for fabricating the same [patent_app_type] => utility [patent_app_number] => 16/426612 [patent_app_country] => US [patent_app_date] => 2019-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 4459 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16426612 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/426612
Semiconductor devices having through electrodes and methods for fabricating the same May 29, 2019 Issued
Array ( [id] => 14843361 [patent_doc_number] => 20190280081 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-12 [patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/424996 [patent_app_country] => US [patent_app_date] => 2019-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8904 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16424996 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/424996
Method of manufacturing a semiconductor device May 28, 2019 Issued
Array ( [id] => 16468419 [patent_doc_number] => 20200369956 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-26 [patent_title] => METHOD TO ENHANCE PHOSPHOR ROBUSTNESS AND DISPERSABILITY AND RESULTING PHOSPHORS [patent_app_type] => utility [patent_app_number] => 16/419206 [patent_app_country] => US [patent_app_date] => 2019-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15394 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16419206 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/419206
Method to enhance phosphor robustness and dispersability and resulting phosphors May 21, 2019 Issued
Array ( [id] => 17063167 [patent_doc_number] => 11107777 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => Substrate structure and semiconductor package structure including the same [patent_app_type] => utility [patent_app_number] => 16/420079 [patent_app_country] => US [patent_app_date] => 2019-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 6563 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16420079 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/420079
Substrate structure and semiconductor package structure including the same May 21, 2019 Issued
Array ( [id] => 17137843 [patent_doc_number] => 11139412 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-05 [patent_title] => Electrical coupling assemblies and methods for optoelectronic modules [patent_app_type] => utility [patent_app_number] => 16/419950 [patent_app_country] => US [patent_app_date] => 2019-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6584 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16419950 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/419950
Electrical coupling assemblies and methods for optoelectronic modules May 21, 2019 Issued
Array ( [id] => 15300255 [patent_doc_number] => 20190393263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => SEMICONDUCTOR DEVICES AND METHODS FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/419101 [patent_app_country] => US [patent_app_date] => 2019-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7611 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16419101 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/419101
Semiconductor devices and methods for manufacturing the same May 21, 2019 Issued
Array ( [id] => 17196174 [patent_doc_number] => 11164941 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-02 [patent_title] => Semiconductor structure and fabrication method [patent_app_type] => utility [patent_app_number] => 16/419830 [patent_app_country] => US [patent_app_date] => 2019-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 6339 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16419830 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/419830
Semiconductor structure and fabrication method May 21, 2019 Issued
Array ( [id] => 15260185 [patent_doc_number] => 20190378826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-12 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 16/419782 [patent_app_country] => US [patent_app_date] => 2019-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5798 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16419782 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/419782
Semiconductor package May 21, 2019 Issued
Array ( [id] => 16865987 [patent_doc_number] => 11024740 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-01 [patent_title] => Asymmetric channel threshold voltage [patent_app_type] => utility [patent_app_number] => 16/420118 [patent_app_country] => US [patent_app_date] => 2019-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 6684 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16420118 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/420118
Asymmetric channel threshold voltage May 21, 2019 Issued
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