Search

Long Pham

Examiner (ID: 5269, Phone: (571)272-1714 , Office: P/2814 )

Most Active Art Unit
2814
Art Unit(s)
2822, 2899, 2897, 2823, 1107, 2814, 2812, 1763
Total Applications
3774
Issued Applications
3306
Pending Applications
160
Abandoned Applications
335

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15641379 [patent_doc_number] => 10593694 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-17 [patent_title] => Method for manufacturing semiconductor memory device and semiconductor memory device [patent_app_type] => utility [patent_app_number] => 16/162667 [patent_app_country] => US [patent_app_date] => 2018-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 33 [patent_no_of_words] => 6857 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16162667 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/162667
Method for manufacturing semiconductor memory device and semiconductor memory device Oct 16, 2018 Issued
Array ( [id] => 13909105 [patent_doc_number] => 20190043757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => Semiconductor Wafer Dicing Crack Prevention Using Chip Peripheral Trenches [patent_app_type] => utility [patent_app_number] => 16/146374 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6676 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16146374 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/146374
Semiconductor wafer dicing crack prevention using chip peripheral trenches Sep 27, 2018 Issued
Array ( [id] => 16339307 [patent_doc_number] => 10790276 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-29 [patent_title] => Methods, apparatus, and system for metal-oxide-semiconductor field-effect transistor (MOSFET) with electrostatic discharge (ESD) protection [patent_app_type] => utility [patent_app_number] => 16/147303 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 6189 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16147303 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/147303
Methods, apparatus, and system for metal-oxide-semiconductor field-effect transistor (MOSFET) with electrostatic discharge (ESD) protection Sep 27, 2018 Issued
Array ( [id] => 17210879 [patent_doc_number] => 11171259 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Electrode substrate for transparent light-emitting diode display and method for manufacturing same [patent_app_type] => utility [patent_app_number] => 16/619034 [patent_app_country] => US [patent_app_date] => 2018-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 6463 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16619034 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/619034
Electrode substrate for transparent light-emitting diode display and method for manufacturing same Sep 13, 2018 Issued
Array ( [id] => 16463945 [patent_doc_number] => 10847304 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-24 [patent_title] => InFO coil on metal plate with slot [patent_app_type] => utility [patent_app_number] => 16/125923 [patent_app_country] => US [patent_app_date] => 2018-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5389 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16125923 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/125923
InFO coil on metal plate with slot Sep 9, 2018 Issued
Array ( [id] => 14317231 [patent_doc_number] => 20190148319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => CHIP, FLEXIBLE DISPLAY PANEL AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/122035 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3801 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122035 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122035
Chip, flexible display panel and display device Sep 4, 2018 Issued
Array ( [id] => 16339292 [patent_doc_number] => 10790261 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-29 [patent_title] => Bonding through multi-shot laser reflow [patent_app_type] => utility [patent_app_number] => 16/121888 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6958 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16121888 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/121888
Bonding through multi-shot laser reflow Sep 4, 2018 Issued
Array ( [id] => 15598357 [patent_doc_number] => 20200075713 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => METHODS OF FORMING SEMICONDUCTOR STRUCTURES [patent_app_type] => utility [patent_app_number] => 16/121966 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5077 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16121966 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/121966
Methods of forming semiconductor structures Sep 4, 2018 Issued
Array ( [id] => 16846132 [patent_doc_number] => 11018229 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-25 [patent_title] => Methods of forming semiconductor structures [patent_app_type] => utility [patent_app_number] => 16/121928 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5268 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16121928 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/121928
Methods of forming semiconductor structures Sep 4, 2018 Issued
Array ( [id] => 14317295 [patent_doc_number] => 20190148351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => Process Control for Package Formation [patent_app_type] => utility [patent_app_number] => 16/121861 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7599 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16121861 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/121861
Process control for package formation Sep 4, 2018 Issued
Array ( [id] => 17971333 [patent_doc_number] => 11488881 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Semiconductor device and method of manufacture [patent_app_type] => utility [patent_app_number] => 16/121866 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 35 [patent_no_of_words] => 13741 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16121866 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/121866
Semiconductor device and method of manufacture Sep 4, 2018 Issued
Array ( [id] => 14024759 [patent_doc_number] => 20190074373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-07 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/121096 [patent_app_country] => US [patent_app_date] => 2018-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24354 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 350 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16121096 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/121096
Semiconductor device Sep 3, 2018 Issued
Array ( [id] => 16700084 [patent_doc_number] => 10950692 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-16 [patent_title] => Methods of forming air gaps between source/drain contacts and the resulting devices [patent_app_type] => utility [patent_app_number] => 16/121058 [patent_app_country] => US [patent_app_date] => 2018-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3332 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16121058 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/121058
Methods of forming air gaps between source/drain contacts and the resulting devices Sep 3, 2018 Issued
Array ( [id] => 15598407 [patent_doc_number] => 20200075738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => WRAPAROUND CONTACT SURROUNDING SOURCE/DRAIN REGIONS OF INTEGRATED CIRCUIT STRUCTURES AND METHOD OF FORMING SAME [patent_app_type] => utility [patent_app_number] => 16/121014 [patent_app_country] => US [patent_app_date] => 2018-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6760 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16121014 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/121014
Wraparound contact surrounding source/drain regions of integrated circuit structures and method of forming same Sep 3, 2018 Issued
Array ( [id] => 16034923 [patent_doc_number] => 10679893 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-09 [patent_title] => Interconnection structure and method of forming the same [patent_app_type] => utility [patent_app_number] => 16/121605 [patent_app_country] => US [patent_app_date] => 2018-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4044 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16121605 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/121605
Interconnection structure and method of forming the same Sep 3, 2018 Issued
Array ( [id] => 14904439 [patent_doc_number] => 20190295985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 16/121186 [patent_app_country] => US [patent_app_date] => 2018-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3517 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16121186 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/121186
Semiconductor device and method for manufacturing same Sep 3, 2018 Issued
Array ( [id] => 14722497 [patent_doc_number] => 20190252312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => Via for Semiconductor Device Connection and Methods of Forming the Same [patent_app_type] => utility [patent_app_number] => 16/121360 [patent_app_country] => US [patent_app_date] => 2018-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9941 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16121360 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/121360
Via for semiconductor device connection and methods of forming the same Sep 3, 2018 Issued
Array ( [id] => 14382013 [patent_doc_number] => 20190164919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => Semiconductor Device and Method of Manufacturing [patent_app_type] => utility [patent_app_number] => 16/121114 [patent_app_country] => US [patent_app_date] => 2018-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9728 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16121114 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/121114
Semiconductor device and method of manufacturing Sep 3, 2018 Issued
Array ( [id] => 16249452 [patent_doc_number] => 10748827 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Packaged semiconductor devices for high voltage with die edge protection [patent_app_type] => utility [patent_app_number] => 16/120922 [patent_app_country] => US [patent_app_date] => 2018-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 37 [patent_no_of_words] => 6255 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16120922 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/120922
Packaged semiconductor devices for high voltage with die edge protection Sep 3, 2018 Issued
Array ( [id] => 14904443 [patent_doc_number] => 20190295987 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/121150 [patent_app_country] => US [patent_app_date] => 2018-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3969 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16121150 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/121150
Semiconductor device Sep 3, 2018 Issued
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