Long Pham

Array ( [id] => 13709315 [patent_doc_number] => 20170365612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-21 [patent_title] => VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/692606 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15692606 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14801413 [patent_doc_number] => 10403717 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Semiconductor devices including contact structures that partially overlap silicide layers [patent_app_type] => utility [patent_app_number] => 15/686838 [patent_app_country] => US [patent_app_date] => 2017-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 10429 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15686838 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13724133 [patent_doc_number] => 20170373022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-28 [patent_title] => Forming Large Chips Through Stitching [patent_app_type] => utility [patent_app_number] => 15/681513 [patent_app_country] => US [patent_app_date] => 2017-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5373 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15681513 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12989305 [patent_doc_number] => 20170345494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => SEMICONDUCTOR DEVICES INCLUDING AUXILIARY BIT LINES [patent_app_type] => utility [patent_app_number] => 15/681910 [patent_app_country] => US [patent_app_date] => 2017-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14420 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15681910 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12990763 [patent_doc_number] => 20170346003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => MEMORY DEVICES INCLUDING PHASE CHANGE MATERIAL ELEMENTS [patent_app_type] => utility [patent_app_number] => 15/682040 [patent_app_country] => US [patent_app_date] => 2017-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7056 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15682040 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12990571 [patent_doc_number] => 20170345935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => METHOD TO FORM STRAINED CHANNEL IN THIN BOX SOI STRUCTURES BY ELASTIC STRAIN RELAXATION OF THE SUBSTRATE [patent_app_type] => utility [patent_app_number] => 15/677855 [patent_app_country] => US [patent_app_date] => 2017-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10557 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15677855 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15108895 [patent_doc_number] => 10475779 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-12 [patent_title] => Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP [patent_app_type] => utility [patent_app_number] => 15/676488 [patent_app_country] => US [patent_app_date] => 2017-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 107 [patent_no_of_words] => 35151 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15676488 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12054491 [patent_doc_number] => 20170330835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-16 [patent_title] => 'EMBEDDED MULTI-DEVICE BRIDGE WITH THROUGH-BRIDGE CONDUCTIVE VIA SIGNAL CONNECTION' [patent_app_type] => utility [patent_app_number] => 15/668179 [patent_app_country] => US [patent_app_date] => 2017-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6181 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15668179 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14366425 [patent_doc_number] => 10304524 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-28 [patent_title] => Semiconductor structure and memory device including the structure [patent_app_type] => utility [patent_app_number] => 15/630614 [patent_app_country] => US [patent_app_date] => 2017-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 4519 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15630614 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15644757 [patent_doc_number] => 10595409 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-17 [patent_title] => Electro-magnetic interference (EMI) shielding techniques and configurations [patent_app_type] => utility [patent_app_number] => 15/628430 [patent_app_country] => US [patent_app_date] => 2017-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 6616 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15628430 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13613461 [patent_doc_number] => 20180358280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-13 [patent_title] => METHODS AND APPARATUS FOR THERMAL INTERFACE MATERIAL (TIM) BOND LINE THICKNESS (BLT) REDUCTION AND TIM ADHESION ENHANCEMENT FOR EFFICIENT THERMAL MANAGEMENT [patent_app_type] => utility [patent_app_number] => 15/617774 [patent_app_country] => US [patent_app_date] => 2017-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6147 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15617774 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13862381 [patent_doc_number] => 10192916 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-29 [patent_title] => Methods of fabricating solid-state imaging devices having flat microlenses [patent_app_type] => utility [patent_app_number] => 15/617523 [patent_app_country] => US [patent_app_date] => 2017-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4823 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15617523 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14036495 [patent_doc_number] => 10230005 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-12 [patent_title] => Four terminal stacked complementary junction field effect transistors [patent_app_type] => utility [patent_app_number] => 15/617665 [patent_app_country] => US [patent_app_date] => 2017-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 8830 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15617665 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13392823 [patent_doc_number] => 20180247954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => SEMICONDUCTOR DEVICE CONTAINING MULTILAYER TITANIUM NITRIDE DIFFUSION BARRIER AND METHOD OF MAKING THEREOF [patent_app_type] => utility [patent_app_number] => 15/617499 [patent_app_country] => US [patent_app_date] => 2017-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14721 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15617499 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13121667 [patent_doc_number] => 10079189 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-18 [patent_title] => P-type transparent conducting nickel oxide alloys [patent_app_type] => utility [patent_app_number] => 15/617339 [patent_app_country] => US [patent_app_date] => 2017-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 8063 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15617339 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12823702 [patent_doc_number] => 20180166406 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-14 [patent_title] => SEMICONDUCTOR DEVICE HAVING A PASSIVATION LAYER AND METHOD OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 15/617405 [patent_app_country] => US [patent_app_date] => 2017-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4609 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15617405 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14267827 [patent_doc_number] => 10283485 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-07 [patent_title] => Semiconductor device including conductive bump interconnections [patent_app_type] => utility [patent_app_number] => 15/617867 [patent_app_country] => US [patent_app_date] => 2017-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 6085 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15617867 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14094297 [patent_doc_number] => 10243063 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-26 [patent_title] => Method of uniform channel formation [patent_app_type] => utility [patent_app_number] => 15/617613 [patent_app_country] => US [patent_app_date] => 2017-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3310 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15617613 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13613693 [patent_doc_number] => 20180358396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-13 [patent_title] => SOLID-STATE IMAGING DEVICES HAVING A MICROLENS LAYER WITH DUMMY STRUCTURES [patent_app_type] => utility [patent_app_number] => 15/616390 [patent_app_country] => US [patent_app_date] => 2017-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5390 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15616390 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13201733 [patent_doc_number] => 10115787 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-10-30 [patent_title] => Low leakage FET [patent_app_type] => utility [patent_app_number] => 15/616811 [patent_app_country] => US [patent_app_date] => 2017-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 8719 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15616811 [rel_patent_id] =>[rel_patent_doc_number] =>)