
Long Pham
Examiner (ID: 16756, Phone: (571)272-1714 , Office: P/2814 )
| Most Active Art Unit | 2814 |
| Art Unit(s) | 2899, 2897, 1107, 2814, 1763, 2812, 2822, 2823 |
| Total Applications | 3709 |
| Issued Applications | 3257 |
| Pending Applications | 178 |
| Abandoned Applications | 335 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 13335151
[patent_doc_number] => 20180219113
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-08-02
[patent_title] => CIGS BASED PHOTOVOLTAIC CELL WITH NON-STOICHIOMETRIC METAL SULFIDE LAYER AND METHOD AND APPARATUS FOR MAKING THEREOF
[patent_app_type] => utility
[patent_app_number] => 15/419518
[patent_app_country] => US
[patent_app_date] => 2017-01-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9914
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15419518
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/419518 | CIGS BASED PHOTOVOLTAIC CELL WITH NON-STOICHIOMETRIC METAL SULFIDE LAYER AND METHOD AND APPARATUS FOR MAKING THEREOF | Jan 29, 2017 | Abandoned |
Array
(
[id] => 11623306
[patent_doc_number] => 20170133494
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-05-11
[patent_title] => 'SEMICONDUCTOR DEVICE WITH LOW BAND-TO-BAND TUNNELING'
[patent_app_type] => utility
[patent_app_number] => 15/415305
[patent_app_country] => US
[patent_app_date] => 2017-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6696
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15415305
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/415305 | Semiconductor device with low band-to-band tunneling | Jan 24, 2017 | Issued |
Array
(
[id] => 12027173
[patent_doc_number] => 20170317272
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-11-02
[patent_title] => 'ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/410571
[patent_app_country] => US
[patent_app_date] => 2017-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 10345
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15410571
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/410571 | Electronic device and method for fabricating the same | Jan 18, 2017 | Issued |
Array
(
[id] => 14769191
[patent_doc_number] => 10395997
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-08-27
[patent_title] => Semiconductor process
[patent_app_type] => utility
[patent_app_number] => 15/409434
[patent_app_country] => US
[patent_app_date] => 2017-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 21
[patent_no_of_words] => 4475
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15409434
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/409434 | Semiconductor process | Jan 17, 2017 | Issued |
Array
(
[id] => 16579016
[patent_doc_number] => 20210013417
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-01-14
[patent_title] => ORGANIC PHOTODETECTOR WITH REDUCED DARK CURRENT
[patent_app_type] => utility
[patent_app_number] => 16/071842
[patent_app_country] => US
[patent_app_date] => 2017-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2003
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 31
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16071842
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/071842 | Organic photodetector with reduced dark current | Jan 15, 2017 | Issued |
Array
(
[id] => 11732708
[patent_doc_number] => 20170194150
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-07-06
[patent_title] => 'DOPING OF A SUBSTRATE VIA A DOPANT CONTAINING POLYMER FILM'
[patent_app_type] => utility
[patent_app_number] => 15/404675
[patent_app_country] => US
[patent_app_date] => 2017-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 8209
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15404675
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/404675 | Doping of a substrate via a dopant containing polymer film | Jan 11, 2017 | Issued |
Array
(
[id] => 12242762
[patent_doc_number] => 20180075625
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-03-15
[patent_title] => 'LED PACKAGE STRUCTURE, DISPLAY APPARATUS, AND METHOD FOR COLOR DISPLAY'
[patent_app_type] => utility
[patent_app_number] => 15/394736
[patent_app_country] => US
[patent_app_date] => 2016-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 11167
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15394736
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/394736 | LED PACKAGE STRUCTURE, DISPLAY APPARATUS, AND METHOD FOR COLOR DISPLAY | Dec 28, 2016 | Abandoned |
Array
(
[id] => 12478092
[patent_doc_number] => 09991286
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-06-05
[patent_title] => Display device and electronic device including the same
[patent_app_type] => utility
[patent_app_number] => 15/370034
[patent_app_country] => US
[patent_app_date] => 2016-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 42
[patent_no_of_words] => 20733
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 401
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15370034
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/370034 | Display device and electronic device including the same | Dec 5, 2016 | Issued |
Array
(
[id] => 12019797
[patent_doc_number] => 09812508
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-11-07
[patent_title] => 'Hybrid bipolar junction transistor'
[patent_app_type] => utility
[patent_app_number] => 15/361471
[patent_app_country] => US
[patent_app_date] => 2016-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 6977
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15361471
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/361471 | Hybrid bipolar junction transistor | Nov 26, 2016 | Issued |
Array
(
[id] => 13030595
[patent_doc_number] => 10037921
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-07-31
[patent_title] => Structure and formation method of fin-like field effect transistor
[patent_app_type] => utility
[patent_app_number] => 15/355626
[patent_app_country] => US
[patent_app_date] => 2016-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 24
[patent_no_of_words] => 7128
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15355626
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/355626 | Structure and formation method of fin-like field effect transistor | Nov 17, 2016 | Issued |
Array
(
[id] => 13951155
[patent_doc_number] => 10211359
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-02-19
[patent_title] => Nano avalanche photodiode architecture for photon detection
[patent_app_type] => utility
[patent_app_number] => 15/356152
[patent_app_country] => US
[patent_app_date] => 2016-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 12
[patent_no_of_words] => 4703
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15356152
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/356152 | Nano avalanche photodiode architecture for photon detection | Nov 17, 2016 | Issued |
Array
(
[id] => 13257621
[patent_doc_number] => 10141508
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-11-27
[patent_title] => Clamp elements for phase change memory arrays
[patent_app_type] => utility
[patent_app_number] => 15/347271
[patent_app_country] => US
[patent_app_date] => 2016-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 45
[patent_no_of_words] => 7837
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15347271
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/347271 | Clamp elements for phase change memory arrays | Nov 8, 2016 | Issued |
Array
(
[id] => 14151629
[patent_doc_number] => 10256204
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-04-09
[patent_title] => Separation of integrated circuit structure from adjacent chip
[patent_app_type] => utility
[patent_app_number] => 15/345608
[patent_app_country] => US
[patent_app_date] => 2016-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6024
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15345608
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/345608 | Separation of integrated circuit structure from adjacent chip | Nov 7, 2016 | Issued |
Array
(
[id] => 12334659
[patent_doc_number] => 09947554
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-04-17
[patent_title] => Support substrate and a method of manufacturing a semiconductor package using the same
[patent_app_type] => utility
[patent_app_number] => 15/345534
[patent_app_country] => US
[patent_app_date] => 2016-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 16
[patent_no_of_words] => 6083
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15345534
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/345534 | Support substrate and a method of manufacturing a semiconductor package using the same | Nov 7, 2016 | Issued |
Array
(
[id] => 12573960
[patent_doc_number] => 10020246
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-07-10
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 15/345560
[patent_app_country] => US
[patent_app_date] => 2016-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 3355
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15345560
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/345560 | Semiconductor device | Nov 7, 2016 | Issued |
Array
(
[id] => 12416895
[patent_doc_number] => 09972580
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-05-15
[patent_title] => Semiconductor package and method for fabricating the same
[patent_app_type] => utility
[patent_app_number] => 15/345779
[patent_app_country] => US
[patent_app_date] => 2016-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 22
[patent_no_of_words] => 4563
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15345779
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/345779 | Semiconductor package and method for fabricating the same | Nov 7, 2016 | Issued |
Array
(
[id] => 12574035
[patent_doc_number] => 10020273
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-07-10
[patent_title] => Semiconductor devices and methods of forming the same
[patent_app_type] => utility
[patent_app_number] => 15/345614
[patent_app_country] => US
[patent_app_date] => 2016-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 25
[patent_no_of_words] => 7723
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15345614
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/345614 | Semiconductor devices and methods of forming the same | Nov 7, 2016 | Issued |
Array
(
[id] => 13019271
[patent_doc_number] => 10032755
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-07-24
[patent_title] => Power semiconductor arrangement having a plurality of power semiconductor switching elements and reduced inductance asymmetry
[patent_app_type] => utility
[patent_app_number] => 15/345751
[patent_app_country] => US
[patent_app_date] => 2016-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 4582
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15345751
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/345751 | Power semiconductor arrangement having a plurality of power semiconductor switching elements and reduced inductance asymmetry | Nov 7, 2016 | Issued |
Array
(
[id] => 13695271
[patent_doc_number] => 20170358590
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-12-14
[patent_title] => INTEGRATED CIRCUIT DEVICE INCLUDING VERTICAL MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 15/345763
[patent_app_country] => US
[patent_app_date] => 2016-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14036
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15345763
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/345763 | Integrated circuit device including vertical memory device and method of manufacturing the same | Nov 7, 2016 | Issued |
Array
(
[id] => 12716635
[patent_doc_number] => 20180130711
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-05-10
[patent_title] => SEMICONDUCTOR FIN LOOP FOR USE WITH DIFFUSION BREAK
[patent_app_type] => utility
[patent_app_number] => 15/345612
[patent_app_country] => US
[patent_app_date] => 2016-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6692
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15345612
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/345612 | Semiconductor fin loop for use with diffusion break | Nov 7, 2016 | Issued |