Search

Long Pham

Examiner (ID: 16756, Phone: (571)272-1714 , Office: P/2814 )

Most Active Art Unit
2814
Art Unit(s)
2899, 2897, 1107, 2814, 1763, 2812, 2822, 2823
Total Applications
3709
Issued Applications
3257
Pending Applications
178
Abandoned Applications
335

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12007315 [patent_doc_number] => 20170311470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-26 [patent_title] => 'IMPLEMENTATION METHOD FOR STACKED CONNECTION BETWEEN ISOLATED CIRCUIT COMPONENTS AND THE CIRCUIT THEREOF' [patent_app_type] => utility [patent_app_number] => 15/258788 [patent_app_country] => US [patent_app_date] => 2016-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3070 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15258788 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/258788
Implementation method for stacked connection between isolated circuit components and the circuit thereof Sep 6, 2016 Issued
Array ( [id] => 11824903 [patent_doc_number] => 20170213840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-27 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 15/258774 [patent_app_country] => US [patent_app_date] => 2016-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 12586 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15258774 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/258774
Semiconductor device and method for manufacturing same Sep 6, 2016 Issued
Array ( [id] => 12355455 [patent_doc_number] => 09953998 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-24 [patent_title] => Semiconductor memory device and method for manufacturing same [patent_app_type] => utility [patent_app_number] => 15/258704 [patent_app_country] => US [patent_app_date] => 2016-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 6129 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15258704 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/258704
Semiconductor memory device and method for manufacturing same Sep 6, 2016 Issued
Array ( [id] => 12375654 [patent_doc_number] => 09960112 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-01 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/259024 [patent_app_country] => US [patent_app_date] => 2016-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4443 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15259024 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/259024
Semiconductor device Sep 6, 2016 Issued
Array ( [id] => 12236071 [patent_doc_number] => 20180068934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-08 [patent_title] => 'PACKAGE FOR DIE-BRIDGE CAPACITOR' [patent_app_type] => utility [patent_app_number] => 15/258819 [patent_app_country] => US [patent_app_date] => 2016-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8377 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15258819 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/258819
Package for die-bridge capacitor Sep 6, 2016 Issued
Array ( [id] => 11824903 [patent_doc_number] => 20170213840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-27 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 15/258774 [patent_app_country] => US [patent_app_date] => 2016-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 12586 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15258774 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/258774
Semiconductor device and method for manufacturing same Sep 6, 2016 Issued
Array ( [id] => 11824835 [patent_doc_number] => 20170213772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-27 [patent_title] => 'METHOD AND STRUCTURE FOR FORMING DIELECTRIC ISOLATED FINFET WITH IMPROVED SOURCE/DRAIN EPITAXY' [patent_app_type] => utility [patent_app_number] => 15/254573 [patent_app_country] => US [patent_app_date] => 2016-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6383 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15254573 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/254573
Method and structure for forming dielectric isolated finFET with improved source/drain epitaxy Aug 31, 2016 Issued
Array ( [id] => 15108785 [patent_doc_number] => 10475724 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-12 [patent_title] => Heat exchangers for dual-sided cooling [patent_app_type] => utility [patent_app_number] => 15/755688 [patent_app_country] => US [patent_app_date] => 2016-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 10480 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15755688 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/755688
Heat exchangers for dual-sided cooling Aug 25, 2016 Issued
Array ( [id] => 12375726 [patent_doc_number] => 09960136 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-01 [patent_title] => Semiconductor device and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 15/239745 [patent_app_country] => US [patent_app_date] => 2016-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 6782 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15239745 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/239745
Semiconductor device and method for manufacturing the same Aug 16, 2016 Issued
Array ( [id] => 13293177 [patent_doc_number] => 10157789 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-18 [patent_title] => Via formation using sidewall image transfer process to define lateral dimension [patent_app_type] => utility [patent_app_number] => 15/239178 [patent_app_country] => US [patent_app_date] => 2016-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 4166 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15239178 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/239178
Via formation using sidewall image transfer process to define lateral dimension Aug 16, 2016 Issued
Array ( [id] => 11824926 [patent_doc_number] => 20170213863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-27 [patent_title] => 'HIGH DYNAMIC RANGE IMAGE SENSOR WITH REDUCED SENSITIVITY TO HIGH INTENSITY LIGHT' [patent_app_type] => utility [patent_app_number] => 15/239537 [patent_app_country] => US [patent_app_date] => 2016-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5398 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15239537 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/239537
High dynamic range image sensor with reduced sensitivity to high intensity light Aug 16, 2016 Issued
Array ( [id] => 11293759 [patent_doc_number] => 20160343691 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'MECHANISMS OF FORMING CONNECTORS FOR PACKAGE ON PACKAGE' [patent_app_type] => utility [patent_app_number] => 15/230695 [patent_app_country] => US [patent_app_date] => 2016-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5244 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15230695 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/230695
Mechanisms of forming connectors for package on package Aug 7, 2016 Issued
Array ( [id] => 11911277 [patent_doc_number] => 09780098 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-03 [patent_title] => 'Integrated structure comprising neighboring transistors' [patent_app_type] => utility [patent_app_number] => 15/229709 [patent_app_country] => US [patent_app_date] => 2016-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 5796 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15229709 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/229709
Integrated structure comprising neighboring transistors Aug 4, 2016 Issued
Array ( [id] => 11293836 [patent_doc_number] => 20160343768 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'SOLID STATE IMAGE PICKUP DEVICE AND METHOD OF PRODUCING SOLID STATE IMAGE PICKUP DEVICE' [patent_app_type] => utility [patent_app_number] => 15/225303 [patent_app_country] => US [patent_app_date] => 2016-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7978 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15225303 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/225303
Solid state image pickup device and method of producing solid state image pickup device Jul 31, 2016 Issued
Array ( [id] => 11293731 [patent_doc_number] => 20160343663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'BODY-BIAS VOLTAGE ROUTING STRUCTURES' [patent_app_type] => utility [patent_app_number] => 15/225689 [patent_app_country] => US [patent_app_date] => 2016-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8926 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15225689 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/225689
Body-bias voltage routing structures Jul 31, 2016 Issued
Array ( [id] => 11475774 [patent_doc_number] => 20170062556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-02 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/218004 [patent_app_country] => US [patent_app_date] => 2016-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 25044 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15218004 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/218004
Semiconductor device and manufacturing method thereof Jul 22, 2016 Issued
Array ( [id] => 13071329 [patent_doc_number] => 10056453 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-21 [patent_title] => Semiconductor wafers with reduced bow and warpage [patent_app_type] => utility [patent_app_number] => 15/217643 [patent_app_country] => US [patent_app_date] => 2016-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 3638 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15217643 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/217643
Semiconductor wafers with reduced bow and warpage Jul 21, 2016 Issued
Array ( [id] => 12147671 [patent_doc_number] => 09881931 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-30 [patent_title] => 'Memory device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 15/217290 [patent_app_country] => US [patent_app_date] => 2016-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 5536 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15217290 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/217290
Memory device and manufacturing method thereof Jul 21, 2016 Issued
Array ( [id] => 12175010 [patent_doc_number] => 09893158 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-13 [patent_title] => 'Semiconductor device comprising a gradually increasing field dielectric layer and method of manufacturing a semiconductor device' [patent_app_type] => utility [patent_app_number] => 15/216889 [patent_app_country] => US [patent_app_date] => 2016-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 8392 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15216889 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/216889
Semiconductor device comprising a gradually increasing field dielectric layer and method of manufacturing a semiconductor device Jul 21, 2016 Issued
Array ( [id] => 11599731 [patent_doc_number] => 09646908 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-09 [patent_title] => 'Method for manufacturing semiconductor device and semiconductor device' [patent_app_type] => utility [patent_app_number] => 15/217599 [patent_app_country] => US [patent_app_date] => 2016-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 5429 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15217599 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/217599
Method for manufacturing semiconductor device and semiconductor device Jul 21, 2016 Issued
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