Search

Long Pham

Examiner (ID: 16756, Phone: (571)272-1714 , Office: P/2814 )

Most Active Art Unit
2814
Art Unit(s)
2899, 2897, 1107, 2814, 1763, 2812, 2822, 2823
Total Applications
3709
Issued Applications
3257
Pending Applications
178
Abandoned Applications
335

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12175031 [patent_doc_number] => 09893179 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-13 [patent_title] => 'Method for producing semiconductor device and semiconductor device' [patent_app_type] => utility [patent_app_number] => 15/191712 [patent_app_country] => US [patent_app_date] => 2016-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 138 [patent_no_of_words] => 9980 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15191712 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/191712
Method for producing semiconductor device and semiconductor device Jun 23, 2016 Issued
Array ( [id] => 12953368 [patent_doc_number] => 09837265 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-05 [patent_title] => Gas flow profile modulated control of overlay in plasma CVD films [patent_app_type] => utility [patent_app_number] => 15/192732 [patent_app_country] => US [patent_app_date] => 2016-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 6625 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15192732 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/192732
Gas flow profile modulated control of overlay in plasma CVD films Jun 23, 2016 Issued
Array ( [id] => 11353589 [patent_doc_number] => 20160372329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-22 [patent_title] => 'Methods for Forming a Semiconductor Device and a Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 15/178039 [patent_app_country] => US [patent_app_date] => 2016-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8086 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15178039 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/178039
Methods for forming a semiconductor device and a semiconductor device Jun 8, 2016 Issued
Array ( [id] => 11087884 [patent_doc_number] => 20160284852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-29 [patent_title] => 'GATE-ALL-AROUND FIN DEVICE' [patent_app_type] => utility [patent_app_number] => 15/171288 [patent_app_country] => US [patent_app_date] => 2016-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3566 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15171288 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/171288
Gate-all-around fin device Jun 1, 2016 Issued
Array ( [id] => 11471032 [patent_doc_number] => 20170057814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-02 [patent_title] => 'MEMS AND CMOS INTEGRATION WITH LOW-TEMPERATURE BONDING' [patent_app_type] => utility [patent_app_number] => 15/170154 [patent_app_country] => US [patent_app_date] => 2016-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7739 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15170154 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/170154
MEMS and CMOS integration with low-temperature bonding May 31, 2016 Issued
Array ( [id] => 11079475 [patent_doc_number] => 20160276439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-22 [patent_title] => 'OUTPUT CAPACITANCE REDUCTION IN POWER TRANSISTORS' [patent_app_type] => utility [patent_app_number] => 15/169777 [patent_app_country] => US [patent_app_date] => 2016-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13698 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15169777 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/169777
OUTPUT CAPACITANCE REDUCTION IN POWER TRANSISTORS May 31, 2016 Abandoned
Array ( [id] => 11071207 [patent_doc_number] => 20160268170 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-15 [patent_title] => 'SEMICONDUCTOR ARRANGEMENT AND FORMATION THEREOF' [patent_app_type] => utility [patent_app_number] => 15/160257 [patent_app_country] => US [patent_app_date] => 2016-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4262 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15160257 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/160257
Semiconductor arrangement and formation thereof May 19, 2016 Issued
Array ( [id] => 11043532 [patent_doc_number] => 20160240488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-18 [patent_title] => 'SEMICONDUCTOR DEVICE WITH AN ISOLATION STRUCTURE COUPLED TO A COVER OF THE SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/136326 [patent_app_country] => US [patent_app_date] => 2016-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7170 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15136326 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/136326
Semiconductor device with an isolation structure coupled to a cover of the semiconductor device Apr 21, 2016 Issued
Array ( [id] => 13201595 [patent_doc_number] => 10115718 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-30 [patent_title] => Method, apparatus, and system for metal-oxide-semiconductor field-effect transistor (MOSFET) with electrostatic discharge (ESD) protection [patent_app_type] => utility [patent_app_number] => 15/134942 [patent_app_country] => US [patent_app_date] => 2016-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 6189 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15134942 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/134942
Method, apparatus, and system for metal-oxide-semiconductor field-effect transistor (MOSFET) with electrostatic discharge (ESD) protection Apr 20, 2016 Issued
Array ( [id] => 12012868 [patent_doc_number] => 09806192 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-31 [patent_title] => 'Suppression of back-gate transistors in RF CMOS switches built on an SOI substrate' [patent_app_type] => utility [patent_app_number] => 15/133669 [patent_app_country] => US [patent_app_date] => 2016-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3390 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15133669 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/133669
Suppression of back-gate transistors in RF CMOS switches built on an SOI substrate Apr 19, 2016 Issued
Array ( [id] => 12005491 [patent_doc_number] => 20170309647 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-26 [patent_title] => 'STRUCTURE AND METHOD TO FORM DEFECT FREE HIGH-MOBILITY SEMICONDUCTOR FINS ON INSULATOR' [patent_app_type] => utility [patent_app_number] => 15/134083 [patent_app_country] => US [patent_app_date] => 2016-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7109 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15134083 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/134083
Structure and method to form defect free high-mobility semiconductor fins on insulator Apr 19, 2016 Issued
Array ( [id] => 17438988 [patent_doc_number] => 11264329 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-01 [patent_title] => Semiconductor device having metal interconnects with different thicknesses [patent_app_type] => utility [patent_app_number] => 16/074142 [patent_app_country] => US [patent_app_date] => 2016-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 5303 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16074142 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/074142
Semiconductor device having metal interconnects with different thicknesses Mar 31, 2016 Issued
Array ( [id] => 11021088 [patent_doc_number] => 20160218042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-28 [patent_title] => 'Nonplanar Device and Strain-Generating Channel Dielectric' [patent_app_type] => utility [patent_app_number] => 15/088278 [patent_app_country] => US [patent_app_date] => 2016-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7380 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15088278 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/088278
Nonplanar device and strain-generating channel dielectric Mar 31, 2016 Issued
Array ( [id] => 12263947 [patent_doc_number] => 20180083143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/561996 [patent_app_country] => US [patent_app_date] => 2016-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 14841 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15561996 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/561996
Semiconductor device Mar 30, 2016 Issued
Array ( [id] => 11050924 [patent_doc_number] => 20160247883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-25 [patent_title] => 'EPITAXIAL SILICON GERMANIUM FIN FORMATION USING SACRIFICIAL SILICON FIN TEMPLATES' [patent_app_type] => utility [patent_app_number] => 15/078024 [patent_app_country] => US [patent_app_date] => 2016-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2794 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15078024 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/078024
Epitaxial silicon germanium fin formation using sacrificial silicon fin templates Mar 22, 2016 Issued
Array ( [id] => 12263959 [patent_doc_number] => 20180083156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'LIGHT EMITTING DIODE CHIP AND A METHOD FOR THE MANUFACTURE OF A LIGHT EMITTING DIODE CHIP' [patent_app_type] => utility [patent_app_number] => 15/558603 [patent_app_country] => US [patent_app_date] => 2016-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7876 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15558603 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/558603
Light emitting diode chip and a method for the manufacture of a light emitting diode chip Mar 15, 2016 Issued
Array ( [id] => 11959613 [patent_doc_number] => 20170263765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-14 [patent_title] => 'DRIFT-REGION FIELD CONTROL OF AN LDMOS TRANSISTOR USING BIASED SHALLOW-TRENCH FIELD PLATES' [patent_app_type] => utility [patent_app_number] => 15/065280 [patent_app_country] => US [patent_app_date] => 2016-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5228 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15065280 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/065280
Drift-region field control of an LDMOS transistor using biased shallow-trench field plates Mar 8, 2016 Issued
Array ( [id] => 13056951 [patent_doc_number] => 10049872 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-14 [patent_title] => Method for growing epitaxies of a chemical compound semiconductor [patent_app_type] => utility [patent_app_number] => 15/063572 [patent_app_country] => US [patent_app_date] => 2016-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2088 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15063572 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/063572
Method for growing epitaxies of a chemical compound semiconductor Mar 7, 2016 Issued
Array ( [id] => 14011815 [patent_doc_number] => 10224384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-05 [patent_title] => Display [patent_app_type] => utility [patent_app_number] => 15/060682 [patent_app_country] => US [patent_app_date] => 2016-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2471 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15060682 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/060682
Display Mar 3, 2016 Issued
Array ( [id] => 11696262 [patent_doc_number] => 20170171979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-15 [patent_title] => 'InFO Coil on Metal Plate with Slot' [patent_app_type] => utility [patent_app_number] => 15/061419 [patent_app_country] => US [patent_app_date] => 2016-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5582 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15061419 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/061419
InFO coil on metal plate with slot Mar 3, 2016 Issued
Menu