Long Pham

Array ( [id] => 12936430 [patent_doc_number] => 09831377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-28 [patent_title] => Die-cutting approaches for foil-based metallization of solar cells [patent_app_type] => utility [patent_app_number] => 15/055912 [patent_app_country] => US [patent_app_date] => 2016-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 6494 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15055912 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10984476 [patent_doc_number] => 20160181421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-23 [patent_title] => 'SEMICONDUCTOR DEVICES AND RELATED FABRICATION METHODS' [patent_app_type] => utility [patent_app_number] => 15/053745 [patent_app_country] => US [patent_app_date] => 2016-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12573 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15053745 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13188175 [patent_doc_number] => 10109614 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-23 [patent_title] => Silicon package for embedded electronic system having stacked semiconductor chips [patent_app_type] => utility [patent_app_number] => 15/053089 [patent_app_country] => US [patent_app_date] => 2016-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6001 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15053089 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13201743 [patent_doc_number] => 10115792 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-30 [patent_title] => Semiconductor device and method of manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 15/041012 [patent_app_country] => US [patent_app_date] => 2016-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 24 [patent_no_of_words] => 10181 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15041012 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14429781 [patent_doc_number] => 10319704 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-11 [patent_title] => Semiconductor module [patent_app_type] => utility [patent_app_number] => 15/739424 [patent_app_country] => US [patent_app_date] => 2016-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 9907 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 296 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15739424 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10802735 [patent_doc_number] => 20160148892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-26 [patent_title] => 'SOLDER IN CAVITY INTERCONNECTION STRUCTURES' [patent_app_type] => utility [patent_app_number] => 15/009206 [patent_app_country] => US [patent_app_date] => 2016-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4319 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15009206 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11201107 [patent_doc_number] => 09431328 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-08-30 [patent_title] => 'Power device and preparation method thereof' [patent_app_type] => utility [patent_app_number] => 15/007670 [patent_app_country] => US [patent_app_date] => 2016-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 3921 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15007670 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11824861 [patent_doc_number] => 20170213798 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-27 [patent_title] => 'FORMING LARGE CHIPS THROUGH STITCHING' [patent_app_type] => utility [patent_app_number] => 15/006838 [patent_app_country] => US [patent_app_date] => 2016-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 5587 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15006838 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11847599 [patent_doc_number] => 09735156 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-08-15 [patent_title] => 'Semiconductor device and a fabricating method thereof' [patent_app_type] => utility [patent_app_number] => 15/006421 [patent_app_country] => US [patent_app_date] => 2016-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 13795 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15006421 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12019740 [patent_doc_number] => 09812450 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-07 [patent_title] => 'Semiconductor devices and methods of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 15/006265 [patent_app_country] => US [patent_app_date] => 2016-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 47 [patent_no_of_words] => 15161 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15006265 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11111034 [patent_doc_number] => 20160308004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-20 [patent_title] => 'SEMICONDUCTOR DEVICES INCLUDING CONTACT STRUCTURES THAT PARTIALLY OVERLAP SILICIDE LAYERS' [patent_app_type] => utility [patent_app_number] => 15/006717 [patent_app_country] => US [patent_app_date] => 2016-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 10625 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15006717 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11524533 [patent_doc_number] => 09607944 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-03-28 [patent_title] => 'Efficient layout placement of a diode' [patent_app_type] => utility [patent_app_number] => 15/006667 [patent_app_country] => US [patent_app_date] => 2016-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3827 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15006667 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11028752 [patent_doc_number] => 20160225708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-04 [patent_title] => 'SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/006306 [patent_app_country] => US [patent_app_date] => 2016-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 7974 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15006306 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11821675 [patent_doc_number] => 20170210612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-27 [patent_title] => 'ROUGH ANTI-STICTION LAYER FOR MEMS DEVICE' [patent_app_type] => utility [patent_app_number] => 15/006301 [patent_app_country] => US [patent_app_date] => 2016-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5709 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15006301 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11510348 [patent_doc_number] => 09601514 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-03-21 [patent_title] => 'Method and structure for forming dielectric isolated FinFET with improved source/drain epitaxy' [patent_app_type] => utility [patent_app_number] => 15/006284 [patent_app_country] => US [patent_app_date] => 2016-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 6381 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15006284 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11925627 [patent_doc_number] => 09793216 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-17 [patent_title] => 'Fabrication of IC structure with metal plug' [patent_app_type] => utility [patent_app_number] => 15/006426 [patent_app_country] => US [patent_app_date] => 2016-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5863 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15006426 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11346484 [patent_doc_number] => 09530900 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-12-27 [patent_title] => 'Schottky diode and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 15/006579 [patent_app_country] => US [patent_app_date] => 2016-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2327 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15006579 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11818108 [patent_doc_number] => 09722071 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-08-01 [patent_title] => 'Trench power transistor' [patent_app_type] => utility [patent_app_number] => 15/005130 [patent_app_country] => US [patent_app_date] => 2016-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 8674 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15005130 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12040616 [patent_doc_number] => 09818851 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-14 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 15/005195 [patent_app_country] => US [patent_app_date] => 2016-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 72 [patent_no_of_words] => 32244 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 822 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15005195 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11551608 [patent_doc_number] => 09620465 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-11 [patent_title] => 'Dual-sided integrated fan-out package' [patent_app_type] => utility [patent_app_number] => 15/005547 [patent_app_country] => US [patent_app_date] => 2016-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 5943 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15005547 [rel_patent_id] =>[rel_patent_doc_number] =>)