Search

Long Pham

Examiner (ID: 16756, Phone: (571)272-1714 , Office: P/2814 )

Most Active Art Unit
2814
Art Unit(s)
2899, 2897, 1107, 2814, 1763, 2812, 2822, 2823
Total Applications
3709
Issued Applications
3257
Pending Applications
178
Abandoned Applications
335

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11557561 [patent_doc_number] => 20170103808 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-13 [patent_title] => 'PLANAR VARIABLE RESISTANCE MEMORY' [patent_app_type] => utility [patent_app_number] => 14/882147 [patent_app_country] => US [patent_app_date] => 2015-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9820 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14882147 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/882147
Planar variable resistance memory Oct 12, 2015 Issued
Array ( [id] => 11404793 [patent_doc_number] => 20170025331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-26 [patent_title] => 'LEAD FRAME, SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING LEAD FRAME, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/124472 [patent_app_country] => US [patent_app_date] => 2015-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4352 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15124472 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/124472
Lead frame, semiconductor device, method for manufacturing lead frame, and method for manufacturing semiconductor device Oct 5, 2015 Issued
Array ( [id] => 13392541 [patent_doc_number] => 20180247813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => TECHNOLOGIES FOR INVERTING LITHOGRAPHIC PATTERNS AND SEMICONDUCTOR DEVICES INCLUDING HIGH ASPECT RATIO STRUCTURES [patent_app_type] => utility [patent_app_number] => 15/755466 [patent_app_country] => US [patent_app_date] => 2015-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10633 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15755466 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/755466
Technologies for inverting lithographic patterns and semiconductor devices including high aspect ratio structures Sep 24, 2015 Issued
Array ( [id] => 11911148 [patent_doc_number] => 09779967 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-03 [patent_title] => 'Ultra-thin power transistor and synchronous buck converter having customized footprint' [patent_app_type] => utility [patent_app_number] => 14/854140 [patent_app_country] => US [patent_app_date] => 2015-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 6153 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14854140 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/854140
Ultra-thin power transistor and synchronous buck converter having customized footprint Sep 14, 2015 Issued
Array ( [id] => 10659562 [patent_doc_number] => 20160005706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-07 [patent_title] => 'SEMICONDUCTOR DEVICES HAVING THROUGH ELECTRODES, METHODS OF MANUFACTURING THE SAME, AND SEMICONDUCTOR PACKAGES INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/850875 [patent_app_country] => US [patent_app_date] => 2015-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7384 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14850875 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/850875
Semiconductor devices having through electrodes, methods of manufacturing the same, and semiconductor packages including the same Sep 9, 2015 Issued
Array ( [id] => 10795332 [patent_doc_number] => 20160141489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-19 [patent_title] => 'TOPOLOGICAL METHOD TO BUILD SELF-ALIGNED MTJ WITHOUT A MASK' [patent_app_type] => utility [patent_app_number] => 14/841997 [patent_app_country] => US [patent_app_date] => 2015-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3549 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14841997 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/841997
Topological method to build self-aligned MTJ without a mask Aug 31, 2015 Issued
Array ( [id] => 11564727 [patent_doc_number] => 09627322 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-18 [patent_title] => 'Semiconductor device having reduced contact resistance' [patent_app_type] => utility [patent_app_number] => 14/828639 [patent_app_country] => US [patent_app_date] => 2015-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3790 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14828639 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/828639
Semiconductor device having reduced contact resistance Aug 17, 2015 Issued
Array ( [id] => 10472449 [patent_doc_number] => 20150357465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'THRESHOLD VOLTAGE ADJUSTMENT OF A TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 14/828000 [patent_app_country] => US [patent_app_date] => 2015-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4932 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14828000 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/828000
Threshold voltage adjustment of a transistor Aug 16, 2015 Issued
Array ( [id] => 11246580 [patent_doc_number] => 09472631 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-18 [patent_title] => 'Flexible active matrix circuits for interfacing with biological tissue' [patent_app_type] => utility [patent_app_number] => 14/827256 [patent_app_country] => US [patent_app_date] => 2015-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5258 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14827256 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/827256
Flexible active matrix circuits for interfacing with biological tissue Aug 13, 2015 Issued
Array ( [id] => 10472369 [patent_doc_number] => 20150357386 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'HYBRID BIPOLAR JUNCTION TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 14/827266 [patent_app_country] => US [patent_app_date] => 2015-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6946 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14827266 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/827266
Hybrid bipolar junction transistor Aug 13, 2015 Issued
Array ( [id] => 10638436 [patent_doc_number] => 09355946 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-31 [patent_title] => 'Converter having partially thinned leadframe with stacked chips and interposer, free of wires and clips' [patent_app_type] => utility [patent_app_number] => 14/823487 [patent_app_country] => US [patent_app_date] => 2015-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4818 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14823487 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/823487
Converter having partially thinned leadframe with stacked chips and interposer, free of wires and clips Aug 10, 2015 Issued
Array ( [id] => 10472251 [patent_doc_number] => 20150357267 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'COMBINED PACKAGED POWER SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/823908 [patent_app_country] => US [patent_app_date] => 2015-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6726 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14823908 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/823908
Combined packaged power semiconductor device Aug 10, 2015 Issued
Array ( [id] => 11904274 [patent_doc_number] => 09773714 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-26 [patent_title] => 'Semiconductor package resin composition and usage method thereof' [patent_app_type] => utility [patent_app_number] => 14/810631 [patent_app_country] => US [patent_app_date] => 2015-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 20 [patent_no_of_words] => 10806 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14810631 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/810631
Semiconductor package resin composition and usage method thereof Jul 27, 2015 Issued
Array ( [id] => 11411896 [patent_doc_number] => 09559212 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-31 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 14/810700 [patent_app_country] => US [patent_app_date] => 2015-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 52 [patent_no_of_words] => 29067 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14810700 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/810700
Semiconductor device and method for manufacturing the same Jul 27, 2015 Issued
Array ( [id] => 10448203 [patent_doc_number] => 20150333217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-19 [patent_title] => 'DIODE HAVING HIGH BRIGHTNESS AND METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/807632 [patent_app_country] => US [patent_app_date] => 2015-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4146 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14807632 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/807632
Diode having high brightness and method thereof Jul 22, 2015 Issued
Array ( [id] => 10473134 [patent_doc_number] => 20150358151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'COMPLEMENTARY RESISTANCE SWITCH, CONTACT-CONNECTED POLYCRYSTALLINE PIEZO- OR FERROELECTRIC THIN-FILM LAYER, METHOD FOR ENCRYPTING A BIT SEQUENCE' [patent_app_type] => utility [patent_app_number] => 14/800785 [patent_app_country] => US [patent_app_date] => 2015-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 33744 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14800785 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/800785
Complementary resistance switch, contact-connected polycrystalline piezo- or ferroelectric thin-film layer, method for encrypting a bit sequence Jul 15, 2015 Issued
Array ( [id] => 10426468 [patent_doc_number] => 20150311479 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-29 [patent_title] => 'ORGANIC LUMINESCENT MATERIALS, COATING SOLUTION USING SAME FOR ORGANIC' [patent_app_type] => utility [patent_app_number] => 14/793275 [patent_app_country] => US [patent_app_date] => 2015-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7736 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14793275 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/793275
Organic luminescent materials, coating solution using same for organic Jul 6, 2015 Issued
Array ( [id] => 11321669 [patent_doc_number] => 09520419 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-13 [patent_title] => 'Thin film transistor array substrate and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 14/793183 [patent_app_country] => US [patent_app_date] => 2015-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 7508 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14793183 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/793183
Thin film transistor array substrate and manufacturing method thereof Jul 6, 2015 Issued
Array ( [id] => 11681078 [patent_doc_number] => 09679612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-13 [patent_title] => 'Techniques for providing a direct injection semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 14/789453 [patent_app_country] => US [patent_app_date] => 2015-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 19335 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14789453 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/789453
Techniques for providing a direct injection semiconductor memory device Jun 30, 2015 Issued
Array ( [id] => 10418136 [patent_doc_number] => 20150303147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-22 [patent_title] => 'Semiconductor Constructions, Methods of Forming Conductive Structures and Methods of Forming DRAM Cells' [patent_app_type] => utility [patent_app_number] => 14/752680 [patent_app_country] => US [patent_app_date] => 2015-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4441 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14752680 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/752680
Semiconductor Constructions, Methods of Forming Conductive Structures and Methods of Forming DRAM Cells Jun 25, 2015 Abandoned
Menu