Search

Long Pham

Examiner (ID: 16756, Phone: (571)272-1714 , Office: P/2814 )

Most Active Art Unit
2814
Art Unit(s)
2899, 2897, 1107, 2814, 1763, 2812, 2822, 2823
Total Applications
3709
Issued Applications
3257
Pending Applications
178
Abandoned Applications
335

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10487019 [patent_doc_number] => 20150372040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-24 [patent_title] => 'Pixel Isolation Elements, Devices and Associated Methods' [patent_app_type] => utility [patent_app_number] => 14/747875 [patent_app_country] => US [patent_app_date] => 2015-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10230 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14747875 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/747875
Pixel isolation elements, devices and associated methods Jun 22, 2015 Issued
Array ( [id] => 11187430 [patent_doc_number] => 09418839 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-16 [patent_title] => 'Method for the fabrication and transfer of graphene' [patent_app_type] => utility [patent_app_number] => 14/745114 [patent_app_country] => US [patent_app_date] => 2015-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 8935 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14745114 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/745114
Method for the fabrication and transfer of graphene Jun 18, 2015 Issued
Array ( [id] => 10402700 [patent_doc_number] => 20150287708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'Semiconductor Device and Method of Forming a Vertical Interconnect Structure for 3-D FO-WLCSP' [patent_app_type] => utility [patent_app_number] => 14/745203 [patent_app_country] => US [patent_app_date] => 2015-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 48 [patent_no_of_words] => 36809 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14745203 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/745203
Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP Jun 18, 2015 Issued
Array ( [id] => 10395101 [patent_doc_number] => 20150280108 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING PINNED LAYER WITH ENHANCED THERMAL ENDURANCE' [patent_app_type] => utility [patent_app_number] => 14/741446 [patent_app_country] => US [patent_app_date] => 2015-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9287 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14741446 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/741446
Semiconductor device having pinned layer with enhanced thermal endurance Jun 15, 2015 Issued
Array ( [id] => 11585866 [patent_doc_number] => 09640519 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-02 [patent_title] => 'Photo-sensitive silicon package embedding self-powered electronic system' [patent_app_type] => utility [patent_app_number] => 14/737072 [patent_app_country] => US [patent_app_date] => 2015-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6791 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14737072 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/737072
Photo-sensitive silicon package embedding self-powered electronic system Jun 10, 2015 Issued
Array ( [id] => 13640727 [patent_doc_number] => 09847324 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-19 [patent_title] => Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP [patent_app_type] => utility [patent_app_number] => 14/730030 [patent_app_country] => US [patent_app_date] => 2015-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 84 [patent_no_of_words] => 23731 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14730030 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/730030
Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP Jun 2, 2015 Issued
Array ( [id] => 10645355 [patent_doc_number] => 09362230 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-06-07 [patent_title] => 'Methods to form conductive thin film structures' [patent_app_type] => utility [patent_app_number] => 14/722302 [patent_app_country] => US [patent_app_date] => 2015-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2750 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14722302 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/722302
Methods to form conductive thin film structures May 26, 2015 Issued
Array ( [id] => 10370398 [patent_doc_number] => 20150255403 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-10 [patent_title] => 'METHODS RELATED TO FABRICATION OF SHIELDED RADIO-FREQUENCY MODULE' [patent_app_type] => utility [patent_app_number] => 14/720873 [patent_app_country] => US [patent_app_date] => 2015-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7419 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14720873 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/720873
METHODS RELATED TO FABRICATION OF SHIELDED RADIO-FREQUENCY MODULE May 24, 2015 Abandoned
Array ( [id] => 10370397 [patent_doc_number] => 20150255402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-10 [patent_title] => 'PACKAGED RADIO-FREQUENCY MODULE HAVING WIREBOND SHIELDING' [patent_app_type] => utility [patent_app_number] => 14/720872 [patent_app_country] => US [patent_app_date] => 2015-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7415 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14720872 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/720872
PACKAGED RADIO-FREQUENCY MODULE HAVING WIREBOND SHIELDING May 24, 2015 Abandoned
Array ( [id] => 11168108 [patent_doc_number] => 09401326 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-07-26 [patent_title] => 'Split contact structure and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 14/720830 [patent_app_country] => US [patent_app_date] => 2015-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2195 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14720830 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/720830
Split contact structure and fabrication method thereof May 23, 2015 Issued
Array ( [id] => 10385424 [patent_doc_number] => 20150270430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-24 [patent_title] => 'Integrated Avalanche Photodiode Arrays' [patent_app_type] => utility [patent_app_number] => 14/718352 [patent_app_country] => US [patent_app_date] => 2015-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 11478 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14718352 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/718352
Integrated Avalanche Photodiode arrays May 20, 2015 Issued
Array ( [id] => 11453266 [patent_doc_number] => 09576918 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-21 [patent_title] => 'Conductive paths through dielectric with a high aspect ratio for semiconductor devices' [patent_app_type] => utility [patent_app_number] => 14/717169 [patent_app_country] => US [patent_app_date] => 2015-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 15 [patent_no_of_words] => 6542 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14717169 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/717169
Conductive paths through dielectric with a high aspect ratio for semiconductor devices May 19, 2015 Issued
Array ( [id] => 10364019 [patent_doc_number] => 20150249023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-03 [patent_title] => 'SEMICONDUCTOR DEVICE MANUFACTURING METHOD' [patent_app_type] => utility [patent_app_number] => 14/715018 [patent_app_country] => US [patent_app_date] => 2015-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6886 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14715018 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/715018
Semiconductor device manufacturing method May 17, 2015 Issued
Array ( [id] => 10570218 [patent_doc_number] => 09293397 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-03-22 [patent_title] => 'Power device and preparation method thereof' [patent_app_type] => utility [patent_app_number] => 14/711969 [patent_app_country] => US [patent_app_date] => 2015-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 3877 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14711969 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/711969
Power device and preparation method thereof May 13, 2015 Issued
Array ( [id] => 11273677 [patent_doc_number] => 20160336225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'VIA FORMATION USING SIDEWALL IMAGE TRANSFER PROCESS TO DEFINE LATERAL DIMENSION' [patent_app_type] => utility [patent_app_number] => 14/710894 [patent_app_country] => US [patent_app_date] => 2015-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4386 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14710894 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/710894
Via formation using sidewall image transfer process to define lateral dimension May 12, 2015 Issued
Array ( [id] => 11847524 [patent_doc_number] => 09735081 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-15 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 15/309615 [patent_app_country] => US [patent_app_date] => 2015-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5122 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 373 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15309615 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/309615
Semiconductor device May 7, 2015 Issued
Array ( [id] => 11843104 [patent_doc_number] => 09730642 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-15 [patent_title] => 'Neuropsychological spatiotemporal pattern recognition' [patent_app_type] => utility [patent_app_number] => 14/703913 [patent_app_country] => US [patent_app_date] => 2015-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 32 [patent_no_of_words] => 12445 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14703913 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/703913
Neuropsychological spatiotemporal pattern recognition May 4, 2015 Issued
Array ( [id] => 11630962 [patent_doc_number] => 20170141151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-18 [patent_title] => 'SOLID-STATE IMAGING DEVICE, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 15/309521 [patent_app_country] => US [patent_app_date] => 2015-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5415 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15309521 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/309521
Solid-state imaging device, method of manufacturing the same, and electronic device Apr 30, 2015 Issued
Array ( [id] => 10689427 [patent_doc_number] => 20160035572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-04 [patent_title] => 'DOPING OF A SUBSTRATE VIA A DOPANT CONTAINING POLYMER FILM' [patent_app_type] => utility [patent_app_number] => 14/699434 [patent_app_country] => US [patent_app_date] => 2015-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8101 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14699434 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/699434
Doping of a substrate via a dopant containing polymer film Apr 28, 2015 Issued
Array ( [id] => 11121780 [patent_doc_number] => 20160318754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-03 [patent_title] => 'MEMS STRUCTURE HAVING ROUNDED EDGE STOPPER AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/700138 [patent_app_country] => US [patent_app_date] => 2015-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4318 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14700138 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/700138
MEMS structure having rounded edge stopper and method of fabricating the same Apr 28, 2015 Issued
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