
Long Pham
Examiner (ID: 5269, Phone: (571)272-1714 , Office: P/2814 )
| Most Active Art Unit | 2814 |
| Art Unit(s) | 2822, 2899, 2897, 2823, 1107, 2814, 2812, 1763 |
| Total Applications | 3774 |
| Issued Applications | 3306 |
| Pending Applications | 160 |
| Abandoned Applications | 335 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10084988
[patent_doc_number] => 09122336
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-09-01
[patent_title] => 'Conductive electrode structure'
[patent_app_type] => utility
[patent_app_number] => 14/451918
[patent_app_country] => US
[patent_app_date] => 2014-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14451918
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/451918 | Conductive electrode structure | Aug 4, 2014 | Issued |
Array
(
[id] => 10118669
[patent_doc_number] => 09153557
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[patent_kind] => B2
[patent_issue_date] => 2015-10-06
[patent_title] => 'Chip stack embedded packages'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/452323 | Chip stack embedded packages | Aug 4, 2014 | Issued |
Array
(
[id] => 10531369
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[patent_issue_date] => 2016-02-09
[patent_title] => 'Semiconductor component and method'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/452162 | Semiconductor component and method | Aug 4, 2014 | Issued |
Array
(
[id] => 10694907
[patent_doc_number] => 20160041053
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[patent_kind] => A1
[patent_issue_date] => 2016-02-11
[patent_title] => 'SENSOR CO-LOCATED WITH AN ELECTRONIC CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 14/451550
[patent_app_country] => US
[patent_app_date] => 2014-08-05
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/451550 | Sensor co-located with an electronic circuit | Aug 4, 2014 | Issued |
Array
(
[id] => 10631537
[patent_doc_number] => 09349693
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-05-24
[patent_title] => 'Semiconductor device with an isolation structure coupled to a cover of the semiconductor device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/451962 | Semiconductor device with an isolation structure coupled to a cover of the semiconductor device | Aug 4, 2014 | Issued |
Array
(
[id] => 10583939
[patent_doc_number] => 09306067
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[patent_issue_date] => 2016-04-05
[patent_title] => 'Nonplanar device and strain-generating channel dielectric'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/451503 | Nonplanar device and strain-generating channel dielectric | Aug 4, 2014 | Issued |
Array
(
[id] => 10185122
[patent_doc_number] => 09214806
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[patent_kind] => B1
[patent_issue_date] => 2015-12-15
[patent_title] => 'ESD protecting circuit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/451434 | ESD protecting circuit | Aug 4, 2014 | Issued |
Array
(
[id] => 11765345
[patent_doc_number] => 09373803
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-06-21
[patent_title] => 'Electronic device package and manufacturing method thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/451452 | Electronic device package and manufacturing method thereof | Aug 4, 2014 | Issued |
Array
(
[id] => 10624640
[patent_doc_number] => 09343590
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-05-17
[patent_title] => 'Planar semiconductor ESD device and method of making same'
[patent_app_type] => utility
[patent_app_number] => 14/450887
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/450887 | Planar semiconductor ESD device and method of making same | Aug 3, 2014 | Issued |
Array
(
[id] => 10066836
[patent_doc_number] => 09105696
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-08-11
[patent_title] => 'Method of coating surface of substrate hole with layer of reduced graphene oxide'
[patent_app_type] => utility
[patent_app_number] => 14/451377
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/451377 | Method of coating surface of substrate hole with layer of reduced graphene oxide | Aug 3, 2014 | Issued |
Array
(
[id] => 10073685
[patent_doc_number] => 09112051
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-08-18
[patent_title] => 'Three-dimensional flash memory device'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/451252 | Three-dimensional flash memory device | Aug 3, 2014 | Issued |
Array
(
[id] => 10152415
[patent_doc_number] => 09184721
[patent_country] => US
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[patent_issue_date] => 2015-11-10
[patent_title] => 'Signal-transmission-line structure and electronic device using the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/450703 | Signal-transmission-line structure and electronic device using the same | Aug 3, 2014 | Issued |
Array
(
[id] => 10184801
[patent_doc_number] => 09214484
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-12-15
[patent_title] => 'Image sensor packages'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/450864 | Image sensor packages | Aug 3, 2014 | Issued |
Array
(
[id] => 10689430
[patent_doc_number] => 20160035576
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-02-04
[patent_title] => 'SPLIT-GATE SEMICONDUCTOR DEVICE WITH L-SHAPED GATE'
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[patent_app_number] => 14/450727
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/450727 | Split-gate semiconductor device with L-shaped gate | Aug 3, 2014 | Issued |
Array
(
[id] => 10924020
[patent_doc_number] => 20140327041
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[patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/338140 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | Jul 21, 2014 | Abandoned |
Array
(
[id] => 10518762
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/331904 | Semiconductor device with embedded heat spreading | Jul 14, 2014 | Issued |
Array
(
[id] => 10909387
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[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/320823 | Semiconductor memory device | Jun 30, 2014 | Issued |
Array
(
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Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/293229 | Method for forming one or more vias through a semiconductor substrate and forming a redistribution layer on the semiconductor substrate | Jun 1, 2014 | Issued |