Search

Long Pham

Examiner (ID: 5269, Phone: (571)272-1714 , Office: P/2814 )

Most Active Art Unit
2814
Art Unit(s)
2822, 2899, 2897, 2823, 1107, 2814, 2812, 1763
Total Applications
3774
Issued Applications
3306
Pending Applications
160
Abandoned Applications
335

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6564358 [patent_doc_number] => 20100128509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-27 [patent_title] => 'Three-Dimensional Semiconductor Devices and Methods of Operating the Same' [patent_app_type] => utility [patent_app_number] => 12/615424 [patent_app_country] => US [patent_app_date] => 2009-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 54 [patent_no_of_words] => 14708 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20100128509.pdf [firstpage_image] =>[orig_patent_app_number] => 12615424 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/615424
Three-dimensional semiconductor devices Nov 9, 2009 Issued
Array ( [id] => 4610211 [patent_doc_number] => 07994498 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-09 [patent_title] => 'White organic light emitting device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/615577 [patent_app_country] => US [patent_app_date] => 2009-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 6670 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/994/07994498.pdf [firstpage_image] =>[orig_patent_app_number] => 12615577 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/615577
White organic light emitting device and method for manufacturing the same Nov 9, 2009 Issued
Array ( [id] => 4608810 [patent_doc_number] => 07993992 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-09 [patent_title] => 'Semiconductor device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/615309 [patent_app_country] => US [patent_app_date] => 2009-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 41 [patent_no_of_words] => 6267 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/993/07993992.pdf [firstpage_image] =>[orig_patent_app_number] => 12615309 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/615309
Semiconductor device and method of fabricating the same Nov 9, 2009 Issued
Array ( [id] => 7540286 [patent_doc_number] => 08058129 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-15 [patent_title] => 'Lateral double diffused MOS device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/615096 [patent_app_country] => US [patent_app_date] => 2009-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3087 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/058/08058129.pdf [firstpage_image] =>[orig_patent_app_number] => 12615096 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/615096
Lateral double diffused MOS device and method for manufacturing the same Nov 8, 2009 Issued
Array ( [id] => 4608816 [patent_doc_number] => 07993999 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-09 [patent_title] => 'High-K/metal gate CMOS finFET with improved pFET threshold voltage' [patent_app_type] => utility [patent_app_number] => 12/614906 [patent_app_country] => US [patent_app_date] => 2009-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3595 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/993/07993999.pdf [firstpage_image] =>[orig_patent_app_number] => 12614906 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/614906
High-K/metal gate CMOS finFET with improved pFET threshold voltage Nov 8, 2009 Issued
Array ( [id] => 6518868 [patent_doc_number] => 20100123201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-20 [patent_title] => 'Semiconductor Devices' [patent_app_type] => utility [patent_app_number] => 12/614697 [patent_app_country] => US [patent_app_date] => 2009-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6654 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20100123201.pdf [firstpage_image] =>[orig_patent_app_number] => 12614697 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/614697
Semiconductor Devices Nov 8, 2009 Abandoned
Array ( [id] => 6519504 [patent_doc_number] => 20100123252 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-20 [patent_title] => 'LAYOUT DESIGN METHOD AND SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/614833 [patent_app_country] => US [patent_app_date] => 2009-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 6132 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20100123252.pdf [firstpage_image] =>[orig_patent_app_number] => 12614833 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/614833
Layout design method and semiconductor integrated circuit Nov 8, 2009 Issued
Array ( [id] => 6518741 [patent_doc_number] => 20100123190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-20 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/614767 [patent_app_country] => US [patent_app_date] => 2009-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2480 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20100123190.pdf [firstpage_image] =>[orig_patent_app_number] => 12614767 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/614767
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Nov 8, 2009 Abandoned
Array ( [id] => 6361416 [patent_doc_number] => 20100074023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-25 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING NON-VOLATILE MEMORY AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/614465 [patent_app_country] => US [patent_app_date] => 2009-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9342 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20100074023.pdf [firstpage_image] =>[orig_patent_app_number] => 12614465 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/614465
Semiconductor device having non-volatile memory and method of fabricating the same Nov 8, 2009 Issued
Array ( [id] => 6271720 [patent_doc_number] => 20100117078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-13 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/614786 [patent_app_country] => US [patent_app_date] => 2009-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 29053 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20100117078.pdf [firstpage_image] =>[orig_patent_app_number] => 12614786 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/614786
Semiconductor device and method for manufacturing the same Nov 8, 2009 Issued
Array ( [id] => 4517889 [patent_doc_number] => 07932570 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-04-26 [patent_title] => 'Silicon tab edge mount for a wafer level package' [patent_app_type] => utility [patent_app_number] => 12/615188 [patent_app_country] => US [patent_app_date] => 2009-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1647 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/932/07932570.pdf [firstpage_image] =>[orig_patent_app_number] => 12615188 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/615188
Silicon tab edge mount for a wafer level package Nov 8, 2009 Issued
Array ( [id] => 6422221 [patent_doc_number] => 20100102325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-29 [patent_title] => 'VACUUM CHANNEL TRANSISTOR AND DIODE EMITTING THERMAL CATHODE ELECTRONS, AND METHOD OF MANUFACTURING THE VACUUM CHANNEL TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 12/606317 [patent_app_country] => US [patent_app_date] => 2009-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7625 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20100102325.pdf [firstpage_image] =>[orig_patent_app_number] => 12606317 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/606317
Vacuum channel transistor and diode emitting thermal cathode electrons, and method of manufacturing the vacuum channel transistor Oct 26, 2009 Issued
Array ( [id] => 5989252 [patent_doc_number] => 20110012203 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-20 [patent_title] => 'THIN FILM TRANSISTOR PANEL AND FABRICATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/605566 [patent_app_country] => US [patent_app_date] => 2009-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6781 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20110012203.pdf [firstpage_image] =>[orig_patent_app_number] => 12605566 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/605566
Thin film transistor panel and fabricating method thereof Oct 25, 2009 Issued
Array ( [id] => 5979893 [patent_doc_number] => 20110095289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-28 [patent_title] => 'Laminated chips package, semiconductor substrate and method of manufacturing the laminated chips package' [patent_app_type] => utility [patent_app_number] => 12/588713 [patent_app_country] => US [patent_app_date] => 2009-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 14944 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20110095289.pdf [firstpage_image] =>[orig_patent_app_number] => 12588713 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/588713
Laminated chips package, semiconductor substrate and method of manufacturing the laminated chips package Oct 25, 2009 Issued
Array ( [id] => 6304306 [patent_doc_number] => 20100109093 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-06 [patent_title] => 'Semiconductor memory devices and methods of fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/588717 [patent_app_country] => US [patent_app_date] => 2009-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5082 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20100109093.pdf [firstpage_image] =>[orig_patent_app_number] => 12588717 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/588717
Semiconductor memory devices and methods of fabricating the same Oct 25, 2009 Issued
Array ( [id] => 4488754 [patent_doc_number] => 07884378 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-02-08 [patent_title] => 'Light emitting diode package structure and lead frame structure thereof' [patent_app_type] => utility [patent_app_number] => 12/606182 [patent_app_country] => US [patent_app_date] => 2009-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2165 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/884/07884378.pdf [firstpage_image] =>[orig_patent_app_number] => 12606182 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/606182
Light emitting diode package structure and lead frame structure thereof Oct 25, 2009 Issued
Array ( [id] => 6422053 [patent_doc_number] => 20100102304 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-29 [patent_title] => 'INVERTED ORGANIC PHOTOSENSITIVE DEVICES' [patent_app_type] => utility [patent_app_number] => 12/605958 [patent_app_country] => US [patent_app_date] => 2009-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10763 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20100102304.pdf [firstpage_image] =>[orig_patent_app_number] => 12605958 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/605958
Inverted organic photosensitive devices Oct 25, 2009 Issued
Array ( [id] => 6304070 [patent_doc_number] => 20100109000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-06 [patent_title] => 'CHARGE INJECTION AND TRANSPORT LAYERS' [patent_app_type] => utility [patent_app_number] => 12/605768 [patent_app_country] => US [patent_app_date] => 2009-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 8568 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20100109000.pdf [firstpage_image] =>[orig_patent_app_number] => 12605768 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/605768
Charge injection and transport layers Oct 25, 2009 Issued
Array ( [id] => 7978561 [patent_doc_number] => 08072028 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-06 [patent_title] => 'Method and device including transistor component having a field electrode' [patent_app_type] => utility [patent_app_number] => 12/605933 [patent_app_country] => US [patent_app_date] => 2009-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 38 [patent_no_of_words] => 8937 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/072/08072028.pdf [firstpage_image] =>[orig_patent_app_number] => 12605933 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/605933
Method and device including transistor component having a field electrode Oct 25, 2009 Issued
Array ( [id] => 5980173 [patent_doc_number] => 20110095371 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-28 [patent_title] => 'Gate minimization threshold voltage of FET for synchronous rectification' [patent_app_type] => utility [patent_app_number] => 12/589456 [patent_app_country] => US [patent_app_date] => 2009-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1908 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20110095371.pdf [firstpage_image] =>[orig_patent_app_number] => 12589456 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/589456
Gate minimization threshold voltage of FET for synchronous rectification Oct 25, 2009 Issued
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