
Long T. Nguyen
Examiner (ID: 18925, Phone: (571)272-1753 , Office: P/2842 )
| Most Active Art Unit | 2842 |
| Art Unit(s) | 2816, 2842, 2836 |
| Total Applications | 2015 |
| Issued Applications | 1765 |
| Pending Applications | 111 |
| Abandoned Applications | 163 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 12718525
[patent_doc_number] => 20180131341
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-05-10
[patent_title] => LINEAR HIGH VOLTAGE DRIVER WITH PROGRAMMABLE DIFFERENTIAL AND COMMON MODE GAIN
[patent_app_type] => utility
[patent_app_number] => 15/346064
[patent_app_country] => US
[patent_app_date] => 2016-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2541
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -34
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15346064
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/346064 | Linear high voltage driver with programmable differential and common mode gain | Nov 7, 2016 | Issued |
Array
(
[id] => 11631585
[patent_doc_number] => 20170141774
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-05-18
[patent_title] => 'ELECTRONIC DEVICE AND METHOD OF CONTROLLING SWITCHING ELEMENTS'
[patent_app_type] => utility
[patent_app_number] => 15/345994
[patent_app_country] => US
[patent_app_date] => 2016-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 11502
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15345994
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/345994 | Electronic device and method of controlling switching elements | Nov 7, 2016 | Issued |
Array
(
[id] => 14152831
[patent_doc_number] => 10256809
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-04-09
[patent_title] => Power-on reset circuit
[patent_app_type] => utility
[patent_app_number] => 15/345200
[patent_app_country] => US
[patent_app_date] => 2016-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 9026
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 275
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15345200
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/345200 | Power-on reset circuit | Nov 6, 2016 | Issued |
Array
(
[id] => 14152831
[patent_doc_number] => 10256809
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-04-09
[patent_title] => Power-on reset circuit
[patent_app_type] => utility
[patent_app_number] => 15/345200
[patent_app_country] => US
[patent_app_date] => 2016-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 9026
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 275
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15345200
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/345200 | Power-on reset circuit | Nov 6, 2016 | Issued |
Array
(
[id] => 13007283
[patent_doc_number] => 10027319
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-07-17
[patent_title] => Circuit arrangement for controlling power transistors of a power converter
[patent_app_type] => utility
[patent_app_number] => 15/344616
[patent_app_country] => US
[patent_app_date] => 2016-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3194
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15344616
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/344616 | Circuit arrangement for controlling power transistors of a power converter | Nov 6, 2016 | Issued |
Array
(
[id] => 13230083
[patent_doc_number] => 10128827
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-11-13
[patent_title] => High-speed phase interpolator
[patent_app_type] => utility
[patent_app_number] => 15/343608
[patent_app_country] => US
[patent_app_date] => 2016-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5650
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15343608
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/343608 | High-speed phase interpolator | Nov 3, 2016 | Issued |
Array
(
[id] => 12718597
[patent_doc_number] => 20180131365
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-05-10
[patent_title] => System and Method for Variable Impedance Gate Driver
[patent_app_type] => utility
[patent_app_number] => 15/344316
[patent_app_country] => US
[patent_app_date] => 2016-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8640
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15344316
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/344316 | System and method for variable impedance gate driver | Nov 3, 2016 | Issued |
Array
(
[id] => 12695275
[patent_doc_number] => 20180123591
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-05-03
[patent_title] => ANALOG MULTIPLEXER
[patent_app_type] => utility
[patent_app_number] => 15/340423
[patent_app_country] => US
[patent_app_date] => 2016-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8937
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15340423
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/340423 | Analog multiplexer | Oct 31, 2016 | Issued |
Array
(
[id] => 12438582
[patent_doc_number] => 09979381
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-05-22
[patent_title] => Semi-data gated flop with low clock power/low internal power with minimal area overhead
[patent_app_type] => utility
[patent_app_number] => 15/338181
[patent_app_country] => US
[patent_app_date] => 2016-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7867
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15338181
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/338181 | Semi-data gated flop with low clock power/low internal power with minimal area overhead | Oct 27, 2016 | Issued |
Array
(
[id] => 14399215
[patent_doc_number] => 10312902
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-06-04
[patent_title] => Low-area, low-power, power-on reset circuit
[patent_app_type] => utility
[patent_app_number] => 15/337587
[patent_app_country] => US
[patent_app_date] => 2016-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2861
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15337587
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/337587 | Low-area, low-power, power-on reset circuit | Oct 27, 2016 | Issued |
Array
(
[id] => 11439961
[patent_doc_number] => 20170040982
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-02-09
[patent_title] => 'Latch and D Flip-Flop'
[patent_app_type] => utility
[patent_app_number] => 15/331209
[patent_app_country] => US
[patent_app_date] => 2016-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8307
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15331209
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/331209 | Latch and D Flip-Flop | Oct 20, 2016 | Abandoned |
Array
(
[id] => 15377241
[patent_doc_number] => 10530353
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-01-07
[patent_title] => Gate drive control system for SiC and IGBT power devices to control desaturation or short circuit faults
[patent_app_type] => utility
[patent_app_number] => 15/767058
[patent_app_country] => US
[patent_app_date] => 2016-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 8272
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15767058
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/767058 | Gate drive control system for SiC and IGBT power devices to control desaturation or short circuit faults | Oct 19, 2016 | Issued |
Array
(
[id] => 11572395
[patent_doc_number] => 20170111039
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-04-20
[patent_title] => 'POWER-ON RESET CIRCUIT WITH RESET TRANSITION BASED ON VT'
[patent_app_type] => utility
[patent_app_number] => 15/299458
[patent_app_country] => US
[patent_app_date] => 2016-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2744
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15299458
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/299458 | Power-on reset circuit with reset transition delay | Oct 19, 2016 | Issued |
Array
(
[id] => 12652269
[patent_doc_number] => 20180109254
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-04-19
[patent_title] => CONTROLLING AT LEAST TWO TRANSISTORS
[patent_app_type] => utility
[patent_app_number] => 15/294059
[patent_app_country] => US
[patent_app_date] => 2016-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5982
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15294059
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/294059 | Controlling at least two transistors | Oct 13, 2016 | Issued |
Array
(
[id] => 11631577
[patent_doc_number] => 20170141767
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-05-18
[patent_title] => 'BUFFER CIRCUIT AND VOLTAGE GENERATOR USING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/286969
[patent_app_country] => US
[patent_app_date] => 2016-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6331
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15286969
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/286969 | Buffer circuit and voltage generator using the same | Oct 5, 2016 | Issued |
Array
(
[id] => 11593486
[patent_doc_number] => 20170117898
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-04-27
[patent_title] => 'LEVEL SHIFTING CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 15/285348
[patent_app_country] => US
[patent_app_date] => 2016-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 13388
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15285348
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/285348 | LEVEL SHIFTING CIRCUIT | Oct 3, 2016 | Abandoned |
Array
(
[id] => 12617067
[patent_doc_number] => 20180097519
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-04-05
[patent_title] => ADAPTIVE LEVEL SHIFTER
[patent_app_type] => utility
[patent_app_number] => 15/282342
[patent_app_country] => US
[patent_app_date] => 2016-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4528
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15282342
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/282342 | ADAPTIVE LEVEL SHIFTER | Sep 29, 2016 | Abandoned |
Array
(
[id] => 13641619
[patent_doc_number] => 09847775
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-12-19
[patent_title] => Buffer, and multiphase clock generator, semiconductor apparatus and system using the same
[patent_app_type] => utility
[patent_app_number] => 15/279727
[patent_app_country] => US
[patent_app_date] => 2016-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 6879
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15279727
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/279727 | Buffer, and multiphase clock generator, semiconductor apparatus and system using the same | Sep 28, 2016 | Issued |
Array
(
[id] => 12102798
[patent_doc_number] => 09859904
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-01-02
[patent_title] => 'Interpolating feedback divider'
[patent_app_type] => utility
[patent_app_number] => 15/278521
[patent_app_country] => US
[patent_app_date] => 2016-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 5689
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15278521
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/278521 | Interpolating feedback divider | Sep 27, 2016 | Issued |
Array
(
[id] => 12203141
[patent_doc_number] => 09906223
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-02-27
[patent_title] => 'Small signal input buffer'
[patent_app_type] => utility
[patent_app_number] => 15/278166
[patent_app_country] => US
[patent_app_date] => 2016-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4254
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15278166
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/278166 | Small signal input buffer | Sep 27, 2016 | Issued |