Long T. Tran

Array ( [id] => 4253447 [patent_doc_number] => 06137162 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Chip stack package' [patent_app_type] => 1 [patent_app_number] => 9/307657 [patent_app_country] => US [patent_app_date] => 1999-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 3013 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/137/06137162.pdf [firstpage_image] =>[orig_patent_app_number] => 307657 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4087205 [patent_doc_number] => 06133115 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Formation of gate electrode' [patent_app_type] => 1 [patent_app_number] => 9/292020 [patent_app_country] => US [patent_app_date] => 1999-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 26 [patent_no_of_words] => 4206 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/133/06133115.pdf [firstpage_image] =>[orig_patent_app_number] => 292020 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4084383 [patent_doc_number] => 06162720 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 9/217947 [patent_app_country] => US [patent_app_date] => 1998-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 67 [patent_no_of_words] => 5785 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/162/06162720.pdf [firstpage_image] =>[orig_patent_app_number] => 217947 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4132139 [patent_doc_number] => 06121157 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'Semiconductor device and its manufacture' [patent_app_type] => 1 [patent_app_number] => 9/217080 [patent_app_country] => US [patent_app_date] => 1998-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 6640 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/121/06121157.pdf [firstpage_image] =>[orig_patent_app_number] => 217080 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4406238 [patent_doc_number] => 06171947 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Method of reducing incidence of stress-induced voiding in semiconductor interconnect lines' [patent_app_type] => 1 [patent_app_number] => 9/209367 [patent_app_country] => US [patent_app_date] => 1998-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5733 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 398 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/171/06171947.pdf [firstpage_image] =>[orig_patent_app_number] => 209367 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4094042 [patent_doc_number] => 06096569 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Method of and apparatus for manufacturing thin solar battery' [patent_app_type] => 1 [patent_app_number] => 9/201660 [patent_app_country] => US [patent_app_date] => 1998-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 87 [patent_no_of_words] => 14556 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/096/06096569.pdf [firstpage_image] =>[orig_patent_app_number] => 201660 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4155680 [patent_doc_number] => 06156603 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'Manufacturing method for reducing the thickness of a dielectric layer' [patent_app_type] => 1 [patent_app_number] => 9/203020 [patent_app_country] => US [patent_app_date] => 1998-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 1650 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/156/06156603.pdf [firstpage_image] =>[orig_patent_app_number] => 203020 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4084481 [patent_doc_number] => 06162727 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'Chemical treatment for preventing copper dendrite formation and growth' [patent_app_type] => 1 [patent_app_number] => 9/199347 [patent_app_country] => US [patent_app_date] => 1998-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3415 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/162/06162727.pdf [firstpage_image] =>[orig_patent_app_number] => 199347 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4214264 [patent_doc_number] => 06110769 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'SOI (silicon on insulator) device and method for fabricating the same' [patent_app_type] => 1 [patent_app_number] => 9/197580 [patent_app_country] => US [patent_app_date] => 1998-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 3889 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/110/06110769.pdf [firstpage_image] =>[orig_patent_app_number] => 197580 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4172998 [patent_doc_number] => 06083830 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-04 [patent_title] => 'Process for manufacturing a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/192437 [patent_app_country] => US [patent_app_date] => 1998-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2837 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/083/06083830.pdf [firstpage_image] =>[orig_patent_app_number] => 192437 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4153667 [patent_doc_number] => 06103540 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Laterally disposed nanostructures of silicon on an insulating substrate' [patent_app_type] => 1 [patent_app_number] => 9/185990 [patent_app_country] => US [patent_app_date] => 1998-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3190 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/103/06103540.pdf [firstpage_image] =>[orig_patent_app_number] => 185990 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4070256 [patent_doc_number] => 06069015 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-30 [patent_title] => 'Method of fabricating thin film magnetic head including durable wear layer and non-magnetic gap structure' [patent_app_type] => 1 [patent_app_number] => 9/144770 [patent_app_country] => US [patent_app_date] => 1998-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 36 [patent_no_of_words] => 7090 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 547 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/069/06069015.pdf [firstpage_image] =>[orig_patent_app_number] => 144770 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4094259 [patent_doc_number] => 06096583 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => 1 [patent_app_number] => 9/133690 [patent_app_country] => US [patent_app_date] => 1998-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 43 [patent_no_of_words] => 10813 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/096/06096583.pdf [firstpage_image] =>[orig_patent_app_number] => 133690 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4101140 [patent_doc_number] => 06100107 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Microchannel-element assembly and preparation method thereof' [patent_app_type] => 1 [patent_app_number] => 9/137447 [patent_app_country] => US [patent_app_date] => 1998-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 1959 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/100/06100107.pdf [firstpage_image] =>[orig_patent_app_number] => 137447 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4237670 [patent_doc_number] => 06080599 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'Semiconductor optoelectric device and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 9/089130 [patent_app_country] => US [patent_app_date] => 1998-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 37 [patent_no_of_words] => 9236 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/080/06080599.pdf [firstpage_image] =>[orig_patent_app_number] => 089130 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4168605 [patent_doc_number] => 06140151 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-31 [patent_title] => 'Semiconductor wafer processing method' [patent_app_type] => 1 [patent_app_number] => 9/083629 [patent_app_country] => US [patent_app_date] => 1998-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2485 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/140/06140151.pdf [firstpage_image] =>[orig_patent_app_number] => 083629 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4107419 [patent_doc_number] => 06057195 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-02 [patent_title] => 'Method of fabricating high density flat cell mask ROM' [patent_app_type] => 1 [patent_app_number] => 9/083609 [patent_app_country] => US [patent_app_date] => 1998-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 2823 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/057/06057195.pdf [firstpage_image] =>[orig_patent_app_number] => 083609 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4245249 [patent_doc_number] => 06136613 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Method for recycling monitoring control wafers' [patent_app_type] => 1 [patent_app_number] => 9/082659 [patent_app_country] => US [patent_app_date] => 1998-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1784 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/136/06136613.pdf [firstpage_image] =>[orig_patent_app_number] => 082659 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4205165 [patent_doc_number] => 06077771 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-20 [patent_title] => 'Method for forming a barrier layer' [patent_app_type] => 1 [patent_app_number] => 9/082657 [patent_app_country] => US [patent_app_date] => 1998-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1572 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/077/06077771.pdf [firstpage_image] =>[orig_patent_app_number] => 082657 [rel_patent_id] =>[rel_patent_doc_number] =>)