Application number | Title of the application | Filing Date | Status |
---|
Array
(
[id] => 3953554
[patent_doc_number] => 05998879
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-12-07
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 9/017960
[patent_app_country] => US
[patent_app_date] => 1998-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 8415
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/998/05998879.pdf
[firstpage_image] =>[orig_patent_app_number] => 017960
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/017960 | Semiconductor memory device | Feb 2, 1998 | Issued |
Array
(
[id] => 4179904
[patent_doc_number] => 06084283
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-04
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 9/017802
[patent_app_country] => US
[patent_app_date] => 1998-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 24
[patent_no_of_words] => 7310
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 315
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/084/06084283.pdf
[firstpage_image] =>[orig_patent_app_number] => 017802
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/017802 | Semiconductor device and method of manufacturing the same | Feb 2, 1998 | Issued |
Array
(
[id] => 4197503
[patent_doc_number] => 06043537
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-28
[patent_title] => 'Embedded memory logic device using self-aligned silicide and manufacturing method therefor'
[patent_app_type] => 1
[patent_app_number] => 9/016092
[patent_app_country] => US
[patent_app_date] => 1998-01-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 4110
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/043/06043537.pdf
[firstpage_image] =>[orig_patent_app_number] => 016092
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/016092 | Embedded memory logic device using self-aligned silicide and manufacturing method therefor | Jan 29, 1998 | Issued |
09/015950 | READ-ONLY MEMORY HAVING A TRENCH TYPE GATE STRUCTURE | Jan 29, 1998 | Issued |
Array
(
[id] => 4136929
[patent_doc_number] => 06034398
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-07
[patent_title] => 'Semiconductor device and manufacturing method of the same'
[patent_app_type] => 1
[patent_app_number] => 9/013053
[patent_app_country] => US
[patent_app_date] => 1998-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 24
[patent_no_of_words] => 4100
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 236
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/034/06034398.pdf
[firstpage_image] =>[orig_patent_app_number] => 013053
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/013053 | Semiconductor device and manufacturing method of the same | Jan 25, 1998 | Issued |
Array
(
[id] => 4038077
[patent_doc_number] => 05994749
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-30
[patent_title] => 'Semiconductor device having a gate electrode film containing nitrogen'
[patent_app_type] => 1
[patent_app_number] => 9/008941
[patent_app_country] => US
[patent_app_date] => 1998-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 3868
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/994/05994749.pdf
[firstpage_image] =>[orig_patent_app_number] => 008941
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/008941 | Semiconductor device having a gate electrode film containing nitrogen | Jan 19, 1998 | Issued |
Array
(
[id] => 4037831
[patent_doc_number] => 05994733
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-30
[patent_title] => 'Nonvolatile semiconductor memory device and method of fabricating the same'
[patent_app_type] => 1
[patent_app_number] => 9/003641
[patent_app_country] => US
[patent_app_date] => 1998-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 134
[patent_no_of_words] => 12165
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 254
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/994/05994733.pdf
[firstpage_image] =>[orig_patent_app_number] => 003641
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/003641 | Nonvolatile semiconductor memory device and method of fabricating the same | Jan 6, 1998 | Issued |
Array
(
[id] => 3918170
[patent_doc_number] => 06002158
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-12-14
[patent_title] => 'High breakdown-voltage diode with electric-field relaxation region'
[patent_app_type] => 1
[patent_app_number] => 8/998923
[patent_app_country] => US
[patent_app_date] => 1997-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 5445
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/002/06002158.pdf
[firstpage_image] =>[orig_patent_app_number] => 998923
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/998923 | High breakdown-voltage diode with electric-field relaxation region | Dec 28, 1997 | Issued |
Array
(
[id] => 4256962
[patent_doc_number] => 06207971
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-27
[patent_title] => 'Thin film transistor suitable for use in an active matrix type display and method of fabricating the same'
[patent_app_type] => 1
[patent_app_number] => 8/997763
[patent_app_country] => US
[patent_app_date] => 1997-12-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 4461
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/207/06207971.pdf
[firstpage_image] =>[orig_patent_app_number] => 997763
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/997763 | Thin film transistor suitable for use in an active matrix type display and method of fabricating the same | Dec 23, 1997 | Issued |
08/997801 | STRUCTURE OF SEMICONDUCTOR CHIP SUITABLE FOR CHIP-ON-BOARD SYSTEM AND METHODS OF FABRICATING AND MOUNTING THE SAME | Dec 23, 1997 | Abandoned |
Array
(
[id] => 4101550
[patent_doc_number] => 06097059
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-08-01
[patent_title] => 'Transistor, transistor array, method for manufacturing transistor array, and nonvolatile semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 8/997515
[patent_app_country] => US
[patent_app_date] => 1997-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 49
[patent_no_of_words] => 18955
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/097/06097059.pdf
[firstpage_image] =>[orig_patent_app_number] => 997515
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/997515 | Transistor, transistor array, method for manufacturing transistor array, and nonvolatile semiconductor memory | Dec 22, 1997 | Issued |
Array
(
[id] => 4101521
[patent_doc_number] => 06097057
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-08-01
[patent_title] => 'Memory cell for EEPROM devices, and corresponding fabricating process'
[patent_app_type] => 1
[patent_app_number] => 8/996921
[patent_app_country] => US
[patent_app_date] => 1997-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 12
[patent_no_of_words] => 3042
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/097/06097057.pdf
[firstpage_image] =>[orig_patent_app_number] => 996921
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/996921 | Memory cell for EEPROM devices, and corresponding fabricating process | Dec 22, 1997 | Issued |
Array
(
[id] => 4080186
[patent_doc_number] => 05965914
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-10-12
[patent_title] => 'Thin film transistor having a branched gate and channel'
[patent_app_type] => 1
[patent_app_number] => 8/996811
[patent_app_country] => US
[patent_app_date] => 1997-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 56
[patent_no_of_words] => 11660
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/965/05965914.pdf
[firstpage_image] =>[orig_patent_app_number] => 996811
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/996811 | Thin film transistor having a branched gate and channel | Dec 22, 1997 | Issued |
Array
(
[id] => 4080545
[patent_doc_number] => 05965938
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-10-12
[patent_title] => 'Integrated two-tiered via-plug to improve metal lithography # 4'
[patent_app_type] => 1
[patent_app_number] => 8/995335
[patent_app_country] => US
[patent_app_date] => 1997-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 18
[patent_no_of_words] => 5159
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/965/05965938.pdf
[firstpage_image] =>[orig_patent_app_number] => 995335
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/995335 | Integrated two-tiered via-plug to improve metal lithography # 4 | Dec 21, 1997 | Issued |
Array
(
[id] => 4254410
[patent_doc_number] => 06222224
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-04-24
[patent_title] => 'Erasable and programmable nonvolatile semiconductor memory, semiconductor integrated circuit device having the semiconductor memory and method of manufacturing the semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 8/994482
[patent_app_country] => US
[patent_app_date] => 1997-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 23
[patent_no_of_words] => 6366
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/222/06222224.pdf
[firstpage_image] =>[orig_patent_app_number] => 994482
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/994482 | Erasable and programmable nonvolatile semiconductor memory, semiconductor integrated circuit device having the semiconductor memory and method of manufacturing the semiconductor memory | Dec 18, 1997 | Issued |
Array
(
[id] => 3944034
[patent_doc_number] => 05973353
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-10-26
[patent_title] => 'Methods and arrangements for forming a tapered floating gate in non-volatile memory semiconductor devices'
[patent_app_type] => 1
[patent_app_number] => 8/992951
[patent_app_country] => US
[patent_app_date] => 1997-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 2892
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/973/05973353.pdf
[firstpage_image] =>[orig_patent_app_number] => 992951
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/992951 | Methods and arrangements for forming a tapered floating gate in non-volatile memory semiconductor devices | Dec 17, 1997 | Issued |
Array
(
[id] => 4158782
[patent_doc_number] => 06124608
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-26
[patent_title] => 'Non-volatile trench semiconductor device having a shallow drain region'
[patent_app_type] => 1
[patent_app_number] => 8/992961
[patent_app_country] => US
[patent_app_date] => 1997-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 5429
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 339
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/124/06124608.pdf
[firstpage_image] =>[orig_patent_app_number] => 992961
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/992961 | Non-volatile trench semiconductor device having a shallow drain region | Dec 17, 1997 | Issued |
Array
(
[id] => 4299947
[patent_doc_number] => 06180988
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-30
[patent_title] => 'Self-aligned silicided MOSFETS with a graded S/D junction and gate-side air-gap structure'
[patent_app_type] => 1
[patent_app_number] => 8/984871
[patent_app_country] => US
[patent_app_date] => 1997-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 2651
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/180/06180988.pdf
[firstpage_image] =>[orig_patent_app_number] => 984871
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/984871 | Self-aligned silicided MOSFETS with a graded S/D junction and gate-side air-gap structure | Dec 3, 1997 | Issued |
Array
(
[id] => 4265009
[patent_doc_number] => 06204548
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-20
[patent_title] => 'Fuse for semiconductor device and semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/984012
[patent_app_country] => US
[patent_app_date] => 1997-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 22
[patent_no_of_words] => 4619
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/204/06204548.pdf
[firstpage_image] =>[orig_patent_app_number] => 984012
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/984012 | Fuse for semiconductor device and semiconductor device | Dec 2, 1997 | Issued |
Array
(
[id] => 4136854
[patent_doc_number] => 06034393
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-07
[patent_title] => 'Nonvolatile semiconductor memory device using trench isolation and manufacturing method thereof'
[patent_app_type] => 1
[patent_app_number] => 8/982212
[patent_app_country] => US
[patent_app_date] => 1997-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 33
[patent_no_of_words] => 15002
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/034/06034393.pdf
[firstpage_image] =>[orig_patent_app_number] => 982212
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/982212 | Nonvolatile semiconductor memory device using trench isolation and manufacturing method thereof | Nov 30, 1997 | Issued |