Search

Luan Kim Bui

Examiner (ID: 2622, Phone: (571)272-4552 , Office: P/3728 )

Most Active Art Unit
3728
Art Unit(s)
3736, 3728, 2899, 3208, 3727
Total Applications
3674
Issued Applications
2546
Pending Applications
236
Abandoned Applications
892

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16653380 [patent_doc_number] => 10930573 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-23 [patent_title] => Circuit module and manufacturing method therefor [patent_app_type] => utility [patent_app_number] => 16/278381 [patent_app_country] => US [patent_app_date] => 2019-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 41 [patent_no_of_words] => 12840 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16278381 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/278381
Circuit module and manufacturing method therefor Feb 17, 2019 Issued
Array ( [id] => 14446843 [patent_doc_number] => 20190181295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => MICRO LIGHT-EMITTING-DIODE DISPLAY PANEL AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/278688 [patent_app_country] => US [patent_app_date] => 2019-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5386 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16278688 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/278688
Micro light-emitting-diode display panel and manufacturing method thereof Feb 17, 2019 Issued
Array ( [id] => 16339232 [patent_doc_number] => 10790201 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-29 [patent_title] => Silicon carbide semiconductor device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/278314 [patent_app_country] => US [patent_app_date] => 2019-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 7602 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16278314 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/278314
Silicon carbide semiconductor device and method of manufacturing the same Feb 17, 2019 Issued
Array ( [id] => 14446741 [patent_doc_number] => 20190181244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => PILLAR-SHAPED SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME [patent_app_type] => utility [patent_app_number] => 16/277670 [patent_app_country] => US [patent_app_date] => 2019-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17149 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16277670 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/277670
Pillar-shaped semiconductor device and method for producing the same Feb 14, 2019 Issued
Array ( [id] => 15733297 [patent_doc_number] => 10615082 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-07 [patent_title] => VFET metal gate patterning for vertical transport field effect transistor [patent_app_type] => utility [patent_app_number] => 16/267479 [patent_app_country] => US [patent_app_date] => 2019-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 59 [patent_figures_cnt] => 107 [patent_no_of_words] => 23965 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16267479 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/267479
VFET metal gate patterning for vertical transport field effect transistor Feb 4, 2019 Issued
Array ( [id] => 14722755 [patent_doc_number] => 20190252441 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => FABRICATION OF OPTICAL METASURFACES [patent_app_type] => utility [patent_app_number] => 16/267053 [patent_app_country] => US [patent_app_date] => 2019-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7658 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16267053 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/267053
Fabrication of optical metasurfaces Feb 3, 2019 Issued
Array ( [id] => 16560509 [patent_doc_number] => 20210005658 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => IMAGING UNIT AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 16/979592 [patent_app_country] => US [patent_app_date] => 2019-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9382 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16979592 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/979592
Imaging unit having a stacked structure and electronic apparatus including the imaging unit Jan 29, 2019 Issued
Array ( [id] => 17424524 [patent_doc_number] => 11257988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-22 [patent_title] => LED holder, LED module and method for manufacturing LED holder [patent_app_type] => utility [patent_app_number] => 16/262870 [patent_app_country] => US [patent_app_date] => 2019-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 28 [patent_no_of_words] => 9062 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16262870 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/262870
LED holder, LED module and method for manufacturing LED holder Jan 29, 2019 Issued
Array ( [id] => 17188669 [patent_doc_number] => 20210335554 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => METHOD FOR PRODUCING ELECTRODE FOR ALUMINUM ELECTROLYTIC CAPACITOR [patent_app_type] => utility [patent_app_number] => 16/977255 [patent_app_country] => US [patent_app_date] => 2019-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7925 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16977255 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/977255
Method for producing electrode for aluminum electrolytic capacitor Jan 15, 2019 Issued
Array ( [id] => 16182325 [patent_doc_number] => 20200229294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => REFLOWABLE GRID ARRAY TO SUPPORT GRID HEATING [patent_app_type] => utility [patent_app_number] => 16/249499 [patent_app_country] => US [patent_app_date] => 2019-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12474 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16249499 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/249499
Reflowable grid array to support grid heating Jan 15, 2019 Issued
Array ( [id] => 16677312 [patent_doc_number] => 20210066078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => STACK COMPRISING SINGLE-CRYSTAL DIAMOND SUBSTRATE [patent_app_type] => utility [patent_app_number] => 16/962203 [patent_app_country] => US [patent_app_date] => 2019-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13017 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16962203 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/962203
Stack comprising single-crystal diamond substrate Jan 10, 2019 Issued
Array ( [id] => 16163289 [patent_doc_number] => 20200219877 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-09 [patent_title] => STACKED INTEGRATION OF lll-N TRANSISTORS AND THIN-FILM TRANSISTORS [patent_app_type] => utility [patent_app_number] => 16/243344 [patent_app_country] => US [patent_app_date] => 2019-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15794 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16243344 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/243344
Stacked integration of III-N transistors and thin-film transistors Jan 8, 2019 Issued
Array ( [id] => 16163073 [patent_doc_number] => 20200219769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-09 [patent_title] => PLASMA DIE SINGULATION SYSTEMS AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 16/243353 [patent_app_country] => US [patent_app_date] => 2019-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4581 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16243353 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/243353
Plasma die singulation systems and related methods Jan 8, 2019 Issued
Array ( [id] => 16082523 [patent_doc_number] => 20200195248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => GATE DRIVER INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/236965 [patent_app_country] => US [patent_app_date] => 2018-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8345 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16236965 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/236965
Gate driver integrated circuit Dec 30, 2018 Issued
Array ( [id] => 14350545 [patent_doc_number] => 20190157245 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-23 [patent_title] => SEMICONDUCTOR DEVICES INCLUDING STACKED SEMICONDUCTOR CHIPS [patent_app_type] => utility [patent_app_number] => 16/236882 [patent_app_country] => US [patent_app_date] => 2018-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13829 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16236882 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/236882
Semiconductor devices including stacked semiconductor chips Dec 30, 2018 Issued
Array ( [id] => 15840813 [patent_doc_number] => 20200135689 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => WAFER-LEVEL PACKAGING METHODS USING A PHOTOLITHOGRAPHIC BONDING MATERIAL [patent_app_type] => utility [patent_app_number] => 16/236564 [patent_app_country] => US [patent_app_date] => 2018-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13727 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16236564 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/236564
Wafer-level packaging methods using a photolithographic bonding material Dec 29, 2018 Issued
Array ( [id] => 16119639 [patent_doc_number] => 20200211842 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-02 [patent_title] => HIGH BREAKDOWN VOLTAGE STRUCTURE FOR HIGH PERFORMANCE GAN-BASED HEMT AND MOS DEVICES TO ENABLE GAN C-MOS [patent_app_type] => utility [patent_app_number] => 16/232535 [patent_app_country] => US [patent_app_date] => 2018-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8916 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16232535 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/232535
High breakdown voltage structure for high performance GaN-based HEMT and MOS devices to enable GaN C-MOS Dec 25, 2018 Issued
Array ( [id] => 15922089 [patent_doc_number] => 10658293 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Semiconductor device having a multilayer wiring structure [patent_app_type] => utility [patent_app_number] => 16/232370 [patent_app_country] => US [patent_app_date] => 2018-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 31 [patent_no_of_words] => 9371 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 318 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16232370 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/232370
Semiconductor device having a multilayer wiring structure Dec 25, 2018 Issued
Array ( [id] => 18073877 [patent_doc_number] => 11532719 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-20 [patent_title] => Transistors on heterogeneous bonding layers [patent_app_type] => utility [patent_app_number] => 16/222946 [patent_app_country] => US [patent_app_date] => 2018-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 8074 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16222946 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/222946
Transistors on heterogeneous bonding layers Dec 16, 2018 Issued
Array ( [id] => 16081131 [patent_doc_number] => 20200194552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => CAP LAYER ON A POLARIZATION LAYER TO PRESERVE CHANNEL SHEET RESISTANCE [patent_app_type] => utility [patent_app_number] => 16/222976 [patent_app_country] => US [patent_app_date] => 2018-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7754 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16222976 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/222976
Cap layer on a polarization layer to preserve channel sheet resistance Dec 16, 2018 Issued
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