Search

Luan Kim Bui

Examiner (ID: 2622, Phone: (571)272-4552 , Office: P/3728 )

Most Active Art Unit
3728
Art Unit(s)
3736, 3728, 2899, 3208, 3727
Total Applications
3674
Issued Applications
2546
Pending Applications
236
Abandoned Applications
892

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14148403 [patent_doc_number] => 10254574 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-09 [patent_title] => Display device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 15/820564 [patent_app_country] => US [patent_app_date] => 2017-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 46 [patent_no_of_words] => 12723 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15820564 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/820564
Display device and manufacturing method thereof Nov 21, 2017 Issued
Array ( [id] => 12779908 [patent_doc_number] => 20180151804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-31 [patent_title] => INTEGRATION OF MICRO-DEVICES INTO SYSTEM SUBSTRATE [patent_app_type] => utility [patent_app_number] => 15/820683 [patent_app_country] => US [patent_app_date] => 2017-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13796 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15820683 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/820683
Integration of micro-devices into system substrate Nov 21, 2017 Issued
Array ( [id] => 12779902 [patent_doc_number] => 20180151802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-31 [patent_title] => INTERCONNECT STRUCTURE AND METHOD FOR ON-CHIP INFORMATION TRANSFER [patent_app_type] => utility [patent_app_number] => 15/820627 [patent_app_country] => US [patent_app_date] => 2017-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4703 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15820627 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/820627
Interconnect structure and method for on-chip information transfer Nov 21, 2017 Issued
Array ( [id] => 14604085 [patent_doc_number] => 10355241 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-16 [patent_title] => Method of manufacturing a display apparatus including a bending area [patent_app_type] => utility [patent_app_number] => 15/815098 [patent_app_country] => US [patent_app_date] => 2017-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 21 [patent_no_of_words] => 12311 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15815098 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/815098
Method of manufacturing a display apparatus including a bending area Nov 15, 2017 Issued
Array ( [id] => 12738733 [patent_doc_number] => 20180138078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => Method for Regulating Hardmask Over-Etch for Multi-Patterning Processes [patent_app_type] => utility [patent_app_number] => 15/815371 [patent_app_country] => US [patent_app_date] => 2017-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3139 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15815371 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/815371
Method for Regulating Hardmask Over-Etch for Multi-Patterning Processes Nov 15, 2017 Abandoned
Array ( [id] => 15611261 [patent_doc_number] => 10586700 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-10 [patent_title] => Protection of low temperature isolation fill [patent_app_type] => utility [patent_app_number] => 15/815111 [patent_app_country] => US [patent_app_date] => 2017-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7365 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15815111 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/815111
Protection of low temperature isolation fill Nov 15, 2017 Issued
Array ( [id] => 14920125 [patent_doc_number] => 10431389 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => Solid electrolytic capacitor for high voltage environments [patent_app_type] => utility [patent_app_number] => 15/810485 [patent_app_country] => US [patent_app_date] => 2017-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 8866 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15810485 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/810485
Solid electrolytic capacitor for high voltage environments Nov 12, 2017 Issued
Array ( [id] => 13121991 [patent_doc_number] => 10079353 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-18 [patent_title] => Light-emitting device with flexible substrates [patent_app_type] => utility [patent_app_number] => 15/810249 [patent_app_country] => US [patent_app_date] => 2017-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 131 [patent_no_of_words] => 37730 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15810249 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/810249
Light-emitting device with flexible substrates Nov 12, 2017 Issued
Array ( [id] => 14247949 [patent_doc_number] => 10274169 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-30 [patent_title] => MEMS LED zoom [patent_app_type] => utility [patent_app_number] => 15/809381 [patent_app_country] => US [patent_app_date] => 2017-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6949 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15809381 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/809381
MEMS LED zoom Nov 9, 2017 Issued
Array ( [id] => 13543209 [patent_doc_number] => 20180323151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-08 [patent_title] => WET ETCH REMOVAL OF Ru SELECTIVE TO OTHER METALS [patent_app_type] => utility [patent_app_number] => 15/808193 [patent_app_country] => US [patent_app_date] => 2017-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6858 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15808193 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/808193
Wet etch removal of Ru selective to other metals Nov 8, 2017 Issued
Array ( [id] => 14205677 [patent_doc_number] => 10269966 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-23 [patent_title] => Semiconductor device including a fin structure [patent_app_type] => utility [patent_app_number] => 15/807317 [patent_app_country] => US [patent_app_date] => 2017-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 28 [patent_no_of_words] => 5515 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15807317 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/807317
Semiconductor device including a fin structure Nov 7, 2017 Issued
Array ( [id] => 12208515 [patent_doc_number] => 20180053741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-22 [patent_title] => 'BUMP STRUCTURE HAVING A SIDE RECESS AND SEMICONDUCTOR STRUCTURE INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/803008 [patent_app_country] => US [patent_app_date] => 2017-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9451 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15803008 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/803008
Bump structure having a side recess and semiconductor structure including the same Nov 2, 2017 Issued
Array ( [id] => 17188995 [patent_doc_number] => 20210335880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => SOLID-STATE IMAGING DEVICE, MANUFACTURING METHOD THEREOF, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 16/341786 [patent_app_country] => US [patent_app_date] => 2017-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9864 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16341786 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/341786
Solid-state imaging device, manufacturing method thereof, and electronic device Oct 31, 2017 Issued
Array ( [id] => 13057073 [patent_doc_number] => 10049934 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-14 [patent_title] => Wafer processing method [patent_app_type] => utility [patent_app_number] => 15/799567 [patent_app_country] => US [patent_app_date] => 2017-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5503 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15799567 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/799567
Wafer processing method Oct 30, 2017 Issued
Array ( [id] => 13666899 [patent_doc_number] => 10163623 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-12-25 [patent_title] => Etch method with surface modification treatment for forming semiconductor structure [patent_app_type] => utility [patent_app_number] => 15/799489 [patent_app_country] => US [patent_app_date] => 2017-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 48 [patent_no_of_words] => 8122 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15799489 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/799489
Etch method with surface modification treatment for forming semiconductor structure Oct 30, 2017 Issued
Array ( [id] => 13378223 [patent_doc_number] => 20180240653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-23 [patent_title] => FABRICATION OF OPTICAL METASURFACES [patent_app_type] => utility [patent_app_number] => 15/799654 [patent_app_country] => US [patent_app_date] => 2017-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7652 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -35 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15799654 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/799654
Fabrication of optical metasurfaces Oct 30, 2017 Issued
Array ( [id] => 14190905 [patent_doc_number] => 20190115158 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => Conductive Polymer Dispersion for Improved Reliability [patent_app_type] => utility [patent_app_number] => 15/787126 [patent_app_country] => US [patent_app_date] => 2017-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9248 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -54 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15787126 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/787126
Process for forming a solid electrolytic capacitor Oct 17, 2017 Issued
Array ( [id] => 15475577 [patent_doc_number] => 10553675 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Isolation of semiconductor device with buried cavity [patent_app_type] => utility [patent_app_number] => 15/785627 [patent_app_country] => US [patent_app_date] => 2017-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 6055 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15785627 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/785627
Isolation of semiconductor device with buried cavity Oct 16, 2017 Issued
Array ( [id] => 14252991 [patent_doc_number] => 10276704 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-04-30 [patent_title] => High electron mobility transistor with negative capacitor gate [patent_app_type] => utility [patent_app_number] => 15/785610 [patent_app_country] => US [patent_app_date] => 2017-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5009 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15785610 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/785610
High electron mobility transistor with negative capacitor gate Oct 16, 2017 Issued
Array ( [id] => 13921469 [patent_doc_number] => 10204858 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-12 [patent_title] => Semiconductor device having a multilayer wiring structure [patent_app_type] => utility [patent_app_number] => 15/785762 [patent_app_country] => US [patent_app_date] => 2017-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 31 [patent_no_of_words] => 9352 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15785762 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/785762
Semiconductor device having a multilayer wiring structure Oct 16, 2017 Issued
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