Search

Lucien Toplu

Examiner (ID: 9899)

Most Active Art Unit
2316
Art Unit(s)
2755, 2316
Total Applications
258
Issued Applications
156
Pending Applications
13
Abandoned Applications
89

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4052914 [patent_doc_number] => 05995750 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Memory protection system for a multi-tasking system' [patent_app_type] => 1 [patent_app_number] => 8/991422 [patent_app_country] => US [patent_app_date] => 1997-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5328 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/995/05995750.pdf [firstpage_image] =>[orig_patent_app_number] => 991422 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/991422
Memory protection system for a multi-tasking system Dec 15, 1997 Issued
Array ( [id] => 3830535 [patent_doc_number] => 05812843 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-22 [patent_title] => 'System and method for executing job between different operating systems' [patent_app_type] => 1 [patent_app_number] => 8/933250 [patent_app_country] => US [patent_app_date] => 1997-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 7887 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/812/05812843.pdf [firstpage_image] =>[orig_patent_app_number] => 933250 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/933250
System and method for executing job between different operating systems Sep 17, 1997 Issued
Array ( [id] => 3879056 [patent_doc_number] => 05794037 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Direct access to slave processing by unprotected application using context saving and restoration' [patent_app_type] => 1 [patent_app_number] => 8/922419 [patent_app_country] => US [patent_app_date] => 1997-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 10893 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/794/05794037.pdf [firstpage_image] =>[orig_patent_app_number] => 922419 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/922419
Direct access to slave processing by unprotected application using context saving and restoration Sep 2, 1997 Issued
Array ( [id] => 4068137 [patent_doc_number] => 05933624 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-03 [patent_title] => 'Synchronized MIMD multi-processing system and method inhibiting instruction fetch at other processors while one processor services an interrupt' [patent_app_type] => 1 [patent_app_number] => 8/922270 [patent_app_country] => US [patent_app_date] => 1997-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 64 [patent_no_of_words] => 37970 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/933/05933624.pdf [firstpage_image] =>[orig_patent_app_number] => 922270 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/922270
Synchronized MIMD multi-processing system and method inhibiting instruction fetch at other processors while one processor services an interrupt Sep 1, 1997 Issued
Array ( [id] => 3852771 [patent_doc_number] => 05761680 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Coherent film system access during defragmentation operations on a storage medium' [patent_app_type] => 1 [patent_app_number] => 8/919752 [patent_app_country] => US [patent_app_date] => 1997-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4322 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/761/05761680.pdf [firstpage_image] =>[orig_patent_app_number] => 919752 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/919752
Coherent film system access during defragmentation operations on a storage medium Aug 27, 1997 Issued
Array ( [id] => 4031688 [patent_doc_number] => 05881291 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'System for conversion of loop functions in continuation-passing style' [patent_app_type] => 1 [patent_app_number] => 8/915388 [patent_app_country] => US [patent_app_date] => 1997-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3697 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/881/05881291.pdf [firstpage_image] =>[orig_patent_app_number] => 915388 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/915388
System for conversion of loop functions in continuation-passing style Aug 19, 1997 Issued
Array ( [id] => 4225441 [patent_doc_number] => 06029207 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-22 [patent_title] => 'Apparatus and method for dynamic linking of computer software components' [patent_app_type] => 1 [patent_app_number] => 8/914834 [patent_app_country] => US [patent_app_date] => 1997-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5998 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/029/06029207.pdf [firstpage_image] =>[orig_patent_app_number] => 914834 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/914834
Apparatus and method for dynamic linking of computer software components Aug 18, 1997 Issued
Array ( [id] => 3829006 [patent_doc_number] => 05771382 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-23 [patent_title] => 'System and method for synchronizing static variable initialization and reference under a multi-threaded computer environment' [patent_app_type] => 1 [patent_app_number] => 8/911187 [patent_app_country] => US [patent_app_date] => 1997-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5295 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/771/05771382.pdf [firstpage_image] =>[orig_patent_app_number] => 911187 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/911187
System and method for synchronizing static variable initialization and reference under a multi-threaded computer environment Aug 13, 1997 Issued
Array ( [id] => 3872779 [patent_doc_number] => 05768587 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-16 [patent_title] => 'Operating a transaction manager with a non-compliant resource manager' [patent_app_type] => 1 [patent_app_number] => 8/901459 [patent_app_country] => US [patent_app_date] => 1997-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6500 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/768/05768587.pdf [firstpage_image] =>[orig_patent_app_number] => 901459 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/901459
Operating a transaction manager with a non-compliant resource manager Jul 27, 1997 Issued
Array ( [id] => 3803062 [patent_doc_number] => 05822585 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-13 [patent_title] => 'System and method for cooperative processing using object-oriented framework' [patent_app_type] => 1 [patent_app_number] => 8/866471 [patent_app_country] => US [patent_app_date] => 1997-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 7082 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/822/05822585.pdf [firstpage_image] =>[orig_patent_app_number] => 866471 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/866471
System and method for cooperative processing using object-oriented framework May 29, 1997 Issued
Array ( [id] => 4249269 [patent_doc_number] => 06075940 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'System and method for pre-verification of stack usage in bytecode program loops' [patent_app_type] => 1 [patent_app_number] => 8/858793 [patent_app_country] => US [patent_app_date] => 1997-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8022 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/075/06075940.pdf [firstpage_image] =>[orig_patent_app_number] => 858793 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/858793
System and method for pre-verification of stack usage in bytecode program loops May 18, 1997 Issued
Array ( [id] => 3842099 [patent_doc_number] => 05784616 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-21 [patent_title] => 'Apparatus and methods for optimally using available computer resources for task execution during idle-time for future task instances exhibiting incremental value with computation' [patent_app_type] => 1 [patent_app_number] => 8/850621 [patent_app_country] => US [patent_app_date] => 1997-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 15947 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/784/05784616.pdf [firstpage_image] =>[orig_patent_app_number] => 850621 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/850621
Apparatus and methods for optimally using available computer resources for task execution during idle-time for future task instances exhibiting incremental value with computation May 1, 1997 Issued
Array ( [id] => 3842071 [patent_doc_number] => 05784614 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-21 [patent_title] => 'Cache affinity scheduling method for multi-processor nodes in a split transaction bus architecture' [patent_app_type] => 1 [patent_app_number] => 8/841183 [patent_app_country] => US [patent_app_date] => 1997-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3152 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 477 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/784/05784614.pdf [firstpage_image] =>[orig_patent_app_number] => 841183 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/841183
Cache affinity scheduling method for multi-processor nodes in a split transaction bus architecture Apr 27, 1997 Issued
Array ( [id] => 3836721 [patent_doc_number] => 05790851 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-04 [patent_title] => 'Method of sequencing lock call requests to an O/S to avoid spinlock contention within a multi-processor environment' [patent_app_type] => 1 [patent_app_number] => 8/843332 [patent_app_country] => US [patent_app_date] => 1997-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6820 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/790/05790851.pdf [firstpage_image] =>[orig_patent_app_number] => 843332 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/843332
Method of sequencing lock call requests to an O/S to avoid spinlock contention within a multi-processor environment Apr 14, 1997 Issued
Array ( [id] => 3895202 [patent_doc_number] => 05826084 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-20 [patent_title] => 'Microprocessor with circuits, systems, and methods for selectively bypassing external interrupts past the monitor program during virtual program operation' [patent_app_type] => 1 [patent_app_number] => 8/827012 [patent_app_country] => US [patent_app_date] => 1997-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 10647 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/826/05826084.pdf [firstpage_image] =>[orig_patent_app_number] => 827012 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/827012
Microprocessor with circuits, systems, and methods for selectively bypassing external interrupts past the monitor program during virtual program operation Mar 24, 1997 Issued
Array ( [id] => 4098825 [patent_doc_number] => 06055533 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'Software system utilizing a filtered priority queue and method of operation' [patent_app_type] => 1 [patent_app_number] => 8/806222 [patent_app_country] => US [patent_app_date] => 1997-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3900 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/055/06055533.pdf [firstpage_image] =>[orig_patent_app_number] => 806222 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/806222
Software system utilizing a filtered priority queue and method of operation Feb 24, 1997 Issued
Array ( [id] => 4036150 [patent_doc_number] => 05968115 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Complementary concurrent cooperative multi-processing multi-tasking processing system (C3M2)' [patent_app_type] => 1 [patent_app_number] => 8/794045 [patent_app_country] => US [patent_app_date] => 1997-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 22721 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/968/05968115.pdf [firstpage_image] =>[orig_patent_app_number] => 794045 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/794045
Complementary concurrent cooperative multi-processing multi-tasking processing system (C3M2) Feb 2, 1997 Issued
Array ( [id] => 3811802 [patent_doc_number] => 05781755 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-14 [patent_title] => 'Initial program loading of virtual machine' [patent_app_type] => 1 [patent_app_number] => 8/788029 [patent_app_country] => US [patent_app_date] => 1997-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3933 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 349 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/781/05781755.pdf [firstpage_image] =>[orig_patent_app_number] => 788029 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/788029
Initial program loading of virtual machine Jan 22, 1997 Issued
Array ( [id] => 4176623 [patent_doc_number] => 06108684 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Methods and apparatus for balancing loads on a storage subsystem among a plurality of controllers' [patent_app_type] => 1 [patent_app_number] => 8/772618 [patent_app_country] => US [patent_app_date] => 1996-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6952 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/108/06108684.pdf [firstpage_image] =>[orig_patent_app_number] => 772618 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/772618
Methods and apparatus for balancing loads on a storage subsystem among a plurality of controllers Dec 22, 1996 Issued
Array ( [id] => 3848679 [patent_doc_number] => 05740437 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-14 [patent_title] => 'Separating work unit priority and accountability from address spaces' [patent_app_type] => 1 [patent_app_number] => 8/768038 [patent_app_country] => US [patent_app_date] => 1996-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9381 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 435 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/740/05740437.pdf [firstpage_image] =>[orig_patent_app_number] => 768038 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/768038
Separating work unit priority and accountability from address spaces Dec 16, 1996 Issued
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