Search

Lucien Toplu

Examiner (ID: 2858)

Most Active Art Unit
2316
Art Unit(s)
2316, 2755
Total Applications
258
Issued Applications
156
Pending Applications
13
Abandoned Applications
89

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16425200 [patent_doc_number] => 20200350398 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-05 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/931758 [patent_app_country] => US [patent_app_date] => 2020-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5906 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 702 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16931758 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/931758
Semiconductor device and method of manufacturing the same Jul 16, 2020 Issued
Array ( [id] => 16920479 [patent_doc_number] => 20210193571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => CONDUCTIVE CONTACT STRUCTURES FOR ELECTROSTATIC DISCHARGE PROTECTION IN INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 16/724346 [patent_app_country] => US [patent_app_date] => 2019-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16433 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16724346 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/724346
Conductive contact structures for electrostatic discharge protection in integrated circuits Dec 21, 2019 Issued
Array ( [id] => 16796374 [patent_doc_number] => 20210126191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => METHOD FOR FABRICATING SEMICONDUCTOR DEVICE INCLUDING EMBEDDED MAGNETIC RESISTANCE RANDOM ACCESS MEMORY [patent_app_type] => utility [patent_app_number] => 16/689100 [patent_app_country] => US [patent_app_date] => 2019-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4443 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16689100 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/689100
Method for fabricating semiconductor device including embedded magnetic resistance random access memory Nov 19, 2019 Issued
Array ( [id] => 15503673 [patent_doc_number] => 20200052025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND MANUFACTURING PROCESS THEREOF [patent_app_type] => utility [patent_app_number] => 16/595502 [patent_app_country] => US [patent_app_date] => 2019-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4953 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16595502 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/595502
Semiconductor device structure and manufacturing process thereof Oct 7, 2019 Issued
Array ( [id] => 15369867 [patent_doc_number] => 20200020698 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => BIT LINE UTILIZED IN DRAM [patent_app_type] => utility [patent_app_number] => 16/583268 [patent_app_country] => US [patent_app_date] => 2019-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2705 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16583268 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/583268
Bit line utilized in DRAM Sep 25, 2019 Issued
Array ( [id] => 17289038 [patent_doc_number] => 11205598 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-21 [patent_title] => Double sided NMOS/PMOS structure and methods of forming the same [patent_app_type] => utility [patent_app_number] => 16/580702 [patent_app_country] => US [patent_app_date] => 2019-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 3862 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16580702 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/580702
Double sided NMOS/PMOS structure and methods of forming the same Sep 23, 2019 Issued
Array ( [id] => 16928458 [patent_doc_number] => 11049950 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-29 [patent_title] => Trench power seminconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/557835 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5266 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16557835 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/557835
Trench power seminconductor device and manufacturing method thereof Aug 29, 2019 Issued
Array ( [id] => 17310376 [patent_doc_number] => 11211503 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-28 [patent_title] => Memory arrays [patent_app_type] => utility [patent_app_number] => 16/523711 [patent_app_country] => US [patent_app_date] => 2019-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 12579 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16523711 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/523711
Memory arrays Jul 25, 2019 Issued
Array ( [id] => 15092799 [patent_doc_number] => 20190341211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => CONTACT SURFACE FOR MEMS DEVICE [patent_app_type] => utility [patent_app_number] => 16/515678 [patent_app_country] => US [patent_app_date] => 2019-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5301 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16515678 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/515678
CONTACT SURFACE FOR MEMS DEVICE Jul 17, 2019 Abandoned
Array ( [id] => 15370037 [patent_doc_number] => 20200020783 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/507703 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7407 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16507703 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/507703
Semiconductor device and fabrication method thereof Jul 9, 2019 Issued
Array ( [id] => 16944166 [patent_doc_number] => 11056417 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Power conversion apparatus [patent_app_type] => utility [patent_app_number] => 16/507185 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 4773 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16507185 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/507185
Power conversion apparatus Jul 9, 2019 Issued
Array ( [id] => 16578423 [patent_doc_number] => 20210012824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-14 [patent_title] => Memory Cells And Methods Of Forming A Capacitor Including Current Leakage Paths Having Different Total Resistances [patent_app_type] => utility [patent_app_number] => 16/507826 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7264 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16507826 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/507826
Memory cells and methods of forming a capacitor including current leakage paths having different total resistances Jul 9, 2019 Issued
Array ( [id] => 16578820 [patent_doc_number] => 20210013221 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-14 [patent_title] => Memory Arrays And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells And Operative Through-Array-Vias [patent_app_type] => utility [patent_app_number] => 16/507456 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7948 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16507456 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/507456
Memory arrays and methods used in forming a memory array comprising strings of memory cells and operative through-array-vias Jul 9, 2019 Issued
Array ( [id] => 17289028 [patent_doc_number] => 11205588 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-21 [patent_title] => Interconnect architecture with enhanced reliability [patent_app_type] => utility [patent_app_number] => 16/507711 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 39 [patent_no_of_words] => 7825 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16507711 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/507711
Interconnect architecture with enhanced reliability Jul 9, 2019 Issued
Array ( [id] => 17032982 [patent_doc_number] => 11094802 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-17 [patent_title] => Method of manufacturing a semiconductor device and semiconductor device [patent_app_type] => utility [patent_app_number] => 16/507951 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 48 [patent_no_of_words] => 7885 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16507951 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/507951
Method of manufacturing a semiconductor device and semiconductor device Jul 9, 2019 Issued
Array ( [id] => 16578743 [patent_doc_number] => 20210013144 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-14 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/507365 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7095 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16507365 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/507365
Semiconductor device and method of manufacturing a semiconductor device Jul 9, 2019 Issued
Array ( [id] => 16578945 [patent_doc_number] => 20210013346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-14 [patent_title] => MODULAR PHOTOVOLTAIC SYSTEM [patent_app_type] => utility [patent_app_number] => 16/507369 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4007 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 309 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16507369 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/507369
Modular photovoltaic system Jul 9, 2019 Issued
Array ( [id] => 14904423 [patent_doc_number] => 20190295977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => SEMICONDUCTOR DEVICE AND BUMP FORMATION PROCESS [patent_app_type] => utility [patent_app_number] => 16/436795 [patent_app_country] => US [patent_app_date] => 2019-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7341 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16436795 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/436795
Semiconductor device and bump formation process Jun 9, 2019 Issued
Array ( [id] => 15218521 [patent_doc_number] => 20190371947 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => OPTOELECTRONIC DEVICES FORMED OVER A BUFFER [patent_app_type] => utility [patent_app_number] => 16/424292 [patent_app_country] => US [patent_app_date] => 2019-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4013 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16424292 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/424292
Optoelectronic devices formed over a buffer May 27, 2019 Issued
Array ( [id] => 16301116 [patent_doc_number] => 20200286839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-10 [patent_title] => ELECTRONIC DEVICE MODULE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/423803 [patent_app_country] => US [patent_app_date] => 2019-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7232 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16423803 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/423803
Electronic device module and method of manufacturing the same May 27, 2019 Issued
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