Search

Lucien Toplu

Examiner (ID: 4648)

Most Active Art Unit
2316
Art Unit(s)
2755, 2316
Total Applications
258
Issued Applications
156
Pending Applications
13
Abandoned Applications
89

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3776420 [patent_doc_number] => 05742821 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-21 [patent_title] => 'Multiprocessor scheduling and execution' [patent_app_type] => 1 [patent_app_number] => 8/555051 [patent_app_country] => US [patent_app_date] => 1995-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 5965 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/742/05742821.pdf [firstpage_image] =>[orig_patent_app_number] => 555051 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/555051
Multiprocessor scheduling and execution Nov 7, 1995 Issued
Array ( [id] => 3555845 [patent_doc_number] => 05555361 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-10 [patent_title] => 'Multiprocess input system with suppressed amount of communication between processes' [patent_app_type] => 1 [patent_app_number] => 8/553084 [patent_app_country] => US [patent_app_date] => 1995-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5508 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/555/05555361.pdf [firstpage_image] =>[orig_patent_app_number] => 553084 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/553084
Multiprocess input system with suppressed amount of communication between processes Nov 2, 1995 Issued
Array ( [id] => 3984225 [patent_doc_number] => 05887167 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-23 [patent_title] => 'Synchronization mechanism for providing multiple readers and writers access to performance information of an extensible computer system' [patent_app_type] => 1 [patent_app_number] => 8/553104 [patent_app_country] => US [patent_app_date] => 1995-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 7300 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/887/05887167.pdf [firstpage_image] =>[orig_patent_app_number] => 553104 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/553104
Synchronization mechanism for providing multiple readers and writers access to performance information of an extensible computer system Nov 2, 1995 Issued
08/545202 DISPLAY OF DETECTED EVENT FOR INFORMATION HANDLING SYSTEM Oct 18, 1995 Abandoned
Array ( [id] => 3694854 [patent_doc_number] => 05634058 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-27 [patent_title] => 'Dynamically configurable kernel' [patent_app_type] => 1 [patent_app_number] => 8/540875 [patent_app_country] => US [patent_app_date] => 1995-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 7132 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/634/05634058.pdf [firstpage_image] =>[orig_patent_app_number] => 540875 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/540875
Dynamically configurable kernel Oct 10, 1995 Issued
Array ( [id] => 3910585 [patent_doc_number] => 05835765 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-10 [patent_title] => 'Computer operation management system for a computer operating system capable of simultaneously executing plural application programs' [patent_app_type] => 1 [patent_app_number] => 8/539007 [patent_app_country] => US [patent_app_date] => 1995-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 10572 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/835/05835765.pdf [firstpage_image] =>[orig_patent_app_number] => 539007 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/539007
Computer operation management system for a computer operating system capable of simultaneously executing plural application programs Oct 3, 1995 Issued
Array ( [id] => 3905131 [patent_doc_number] => 05778226 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-07 [patent_title] => 'Kernels, description tables and device drivers' [patent_app_type] => 1 [patent_app_number] => 8/531455 [patent_app_country] => US [patent_app_date] => 1995-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 34607 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/778/05778226.pdf [firstpage_image] =>[orig_patent_app_number] => 531455 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/531455
Kernels, description tables and device drivers Sep 20, 1995 Issued
Array ( [id] => 3596392 [patent_doc_number] => 05581769 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-03 [patent_title] => 'Multipurpose program object linkage protocol for upward compatibility among different compilers' [patent_app_type] => 1 [patent_app_number] => 8/527465 [patent_app_country] => US [patent_app_date] => 1995-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5579 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/581/05581769.pdf [firstpage_image] =>[orig_patent_app_number] => 527465 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/527465
Multipurpose program object linkage protocol for upward compatibility among different compilers Sep 12, 1995 Issued
Array ( [id] => 4040751 [patent_doc_number] => 05884077 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-16 [patent_title] => 'Information processing system and method in which computer with high load borrows processor of computer with low load to execute process' [patent_app_type] => 1 [patent_app_number] => 8/520586 [patent_app_country] => US [patent_app_date] => 1995-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 9722 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/884/05884077.pdf [firstpage_image] =>[orig_patent_app_number] => 520586 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/520586
Information processing system and method in which computer with high load borrows processor of computer with low load to execute process Aug 29, 1995 Issued
Array ( [id] => 3661709 [patent_doc_number] => 05606695 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-25 [patent_title] => 'Method of scheduling successive tasks subject only to timing constraints' [patent_app_type] => 1 [patent_app_number] => 8/510533 [patent_app_country] => US [patent_app_date] => 1995-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 7694 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 385 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/606/05606695.pdf [firstpage_image] =>[orig_patent_app_number] => 510533 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/510533
Method of scheduling successive tasks subject only to timing constraints Aug 1, 1995 Issued
08/508017 CACHE AFFINITY SCHEDULING METHOD FOR MULTI-PROCESSOR NODES IN A SPLIT TRANSACTION BUS ARCHITECTURE Jul 26, 1995 Abandoned
Array ( [id] => 1196676 [patent_doc_number] => 06732138 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-04 [patent_title] => 'Method and system for accessing system resources of a data processing system utilizing a kernel-only thread within a user process' [patent_app_type] => B1 [patent_app_number] => 08/506733 [patent_app_country] => US [patent_app_date] => 1995-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3679 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/732/06732138.pdf [firstpage_image] =>[orig_patent_app_number] => 08506733 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/506733
Method and system for accessing system resources of a data processing system utilizing a kernel-only thread within a user process Jul 25, 1995 Issued
Array ( [id] => 4225156 [patent_doc_number] => 06029188 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-22 [patent_title] => 'Information processing system for an architecture model capable of interfacing with humans and capable of being modified' [patent_app_type] => 1 [patent_app_number] => 8/503673 [patent_app_country] => US [patent_app_date] => 1995-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 29 [patent_no_of_words] => 11311 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/029/06029188.pdf [firstpage_image] =>[orig_patent_app_number] => 503673 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/503673
Information processing system for an architecture model capable of interfacing with humans and capable of being modified Jul 17, 1995 Issued
Array ( [id] => 3701785 [patent_doc_number] => 05692192 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-25 [patent_title] => 'Load distribution method and system for distributed threaded task operation in network information processing apparatuses with virtual shared memory' [patent_app_type] => 1 [patent_app_number] => 8/502702 [patent_app_country] => US [patent_app_date] => 1995-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4988 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/692/05692192.pdf [firstpage_image] =>[orig_patent_app_number] => 502702 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/502702
Load distribution method and system for distributed threaded task operation in network information processing apparatuses with virtual shared memory Jul 13, 1995 Issued
08/498647 INITIAL PROGRAM LOADING OF VIRTUAL MAHCINE Jul 5, 1995 Abandoned
08/497636 METHOD FOR FACILITATING USER ACCESS TO STORED INFORMATION IN AN ELECTRONIC TEXT Jun 29, 1995 Abandoned
Array ( [id] => 3903322 [patent_doc_number] => 05724587 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-03 [patent_title] => 'System for controlling task execution in a host processor based upon the maximum DMA resources available to a digital signal processor' [patent_app_type] => 1 [patent_app_number] => 8/474713 [patent_app_country] => US [patent_app_date] => 1995-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 11422 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/724/05724587.pdf [firstpage_image] =>[orig_patent_app_number] => 474713 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/474713
System for controlling task execution in a host processor based upon the maximum DMA resources available to a digital signal processor Jun 7, 1995 Issued
08/476121 METHOD AND SYSTEM FOR EXPANDING A BURIED STACK FRAME Jun 6, 1995 Abandoned
Array ( [id] => 3738729 [patent_doc_number] => 05652879 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-29 [patent_title] => 'Dynamic value mechanism for computer storage container manager enabling access of objects by multiple application programs' [patent_app_type] => 1 [patent_app_number] => 8/478428 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 31139 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/652/05652879.pdf [firstpage_image] =>[orig_patent_app_number] => 478428 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/478428
Dynamic value mechanism for computer storage container manager enabling access of objects by multiple application programs Jun 6, 1995 Issued
Array ( [id] => 3660547 [patent_doc_number] => 05630133 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-13 [patent_title] => 'Customer information control system and method with API start and cancel transaction functions in a loosely coupled parallel processing environment' [patent_app_type] => 1 [patent_app_number] => 8/479702 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7681 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/630/05630133.pdf [firstpage_image] =>[orig_patent_app_number] => 479702 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/479702
Customer information control system and method with API start and cancel transaction functions in a loosely coupled parallel processing environment Jun 6, 1995 Issued
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