Search

Luis A. Gonzalez

Examiner (ID: 13439, Phone: (571)270-3094 , Office: P/3653 )

Most Active Art Unit
3653
Art Unit(s)
3653, 3656
Total Applications
1259
Issued Applications
1045
Pending Applications
78
Abandoned Applications
162

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20060844 [patent_doc_number] => 20250199066 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => TEST IMPLEMENTATION [patent_app_type] => utility [patent_app_number] => 18/967975 [patent_app_country] => US [patent_app_date] => 2024-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18967975 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/967975
TEST IMPLEMENTATION Dec 3, 2024 Pending
Array ( [id] => 19804999 [patent_doc_number] => 20250070924 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => METHODS, SYSTEMS AND APPARATUS FOR SCHEDULING OF HYBRID AUTOMATIC REPEAT REQUEST (HARQ) FEEDBACK [patent_app_type] => utility [patent_app_number] => 18/943077 [patent_app_country] => US [patent_app_date] => 2024-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26998 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18943077 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/943077
METHODS, SYSTEMS AND APPARATUS FOR SCHEDULING OF HYBRID AUTOMATIC REPEAT REQUEST (HARQ) FEEDBACK Nov 10, 2024 Pending
Array ( [id] => 20008880 [patent_doc_number] => 20250147102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/939967 [patent_app_country] => US [patent_app_date] => 2024-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 985 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18939967 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/939967
ELECTRONIC DEVICE Nov 6, 2024 Pending
Array ( [id] => 20487447 [patent_doc_number] => 20260023646 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-22 [patent_title] => PHYSICAL MEMORY BLOCK HEALTH BASED VIRTUAL BLOCK [patent_app_type] => utility [patent_app_number] => 18/940056 [patent_app_country] => US [patent_app_date] => 2024-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3554 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18940056 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/940056
PHYSICAL MEMORY BLOCK HEALTH BASED VIRTUAL BLOCK Nov 6, 2024 Pending
Array ( [id] => 19994551 [patent_doc_number] => 20250132773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-24 [patent_title] => Generalized Implicit Transmission [patent_app_type] => utility [patent_app_number] => 18/924821 [patent_app_country] => US [patent_app_date] => 2024-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16669 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18924821 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/924821
Generalized Implicit Transmission Oct 22, 2024 Pending
Array ( [id] => 19747957 [patent_doc_number] => 20250036522 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-30 [patent_title] => PARALLELIZED SCRUBBING TRANSACTIONS [patent_app_type] => utility [patent_app_number] => 18/915677 [patent_app_country] => US [patent_app_date] => 2024-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8727 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18915677 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/915677
PARALLELIZED SCRUBBING TRANSACTIONS Oct 14, 2024 Pending
Array ( [id] => 19725244 [patent_doc_number] => 20250027995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => CLOCK GATING CIRCUITS AND METHODS FOR DUAL-EDGE-TRIGGERED APPLICATIONS [patent_app_type] => utility [patent_app_number] => 18/908311 [patent_app_country] => US [patent_app_date] => 2024-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9919 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18908311 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/908311
CLOCK GATING CIRCUITS AND METHODS FOR DUAL-EDGE-TRIGGERED APPLICATIONS Oct 6, 2024 Pending
Array ( [id] => 19712376 [patent_doc_number] => 20250022518 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/904143 [patent_app_country] => US [patent_app_date] => 2024-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15723 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18904143 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/904143
NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE Oct 1, 2024 Pending
Array ( [id] => 19694985 [patent_doc_number] => 20250013530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => TRANSMISSION FAILURE FEEDBACK SCHEMES FOR REDUCING CROSSTALK [patent_app_type] => utility [patent_app_number] => 18/891817 [patent_app_country] => US [patent_app_date] => 2024-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18385 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18891817 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/891817
TRANSMISSION FAILURE FEEDBACK SCHEMES FOR REDUCING CROSSTALK Sep 19, 2024 Pending
Array ( [id] => 20124290 [patent_doc_number] => 20250239321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => MEMORY DEVICE AND TEST METHOD FOR THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/888271 [patent_app_country] => US [patent_app_date] => 2024-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7415 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18888271 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/888271
MEMORY DEVICE AND TEST METHOD FOR THE MEMORY DEVICE Sep 17, 2024 Pending
Array ( [id] => 20396714 [patent_doc_number] => 20250372189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => METHOD FOR DETERMINING MEMORY STABILITY AND TESTING COVERAGE [patent_app_type] => utility [patent_app_number] => 18/884079 [patent_app_country] => US [patent_app_date] => 2024-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18884079 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/884079
METHOD FOR DETERMINING MEMORY STABILITY AND TESTING COVERAGE Sep 11, 2024 Pending
Array ( [id] => 20018047 [patent_doc_number] => 20250156269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => SOFT DECODING METHOD, ELECTRONIC DEVICE, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 18/813072 [patent_app_country] => US [patent_app_date] => 2024-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1018 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18813072 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/813072
SOFT DECODING METHOD, ELECTRONIC DEVICE, AND STORAGE MEDIUM Aug 22, 2024 Pending
Array ( [id] => 19662879 [patent_doc_number] => 20240429944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => ERROR CORRECTION [patent_app_type] => utility [patent_app_number] => 18/813896 [patent_app_country] => US [patent_app_date] => 2024-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6397 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18813896 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/813896
ERROR CORRECTION Aug 22, 2024 Pending
Array ( [id] => 19635479 [patent_doc_number] => 20240413928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => ERROR CORRECTION ENCODING DEVICE, ERROR CORRECTION DECODING DEVICE, ERROR CORRECTION ENCODING METHOD, ERROR CORRECTION DECODING METHOD, CONTROL CIRCUIT, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 18/812638 [patent_app_country] => US [patent_app_date] => 2024-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5765 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18812638 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/812638
ERROR CORRECTION ENCODING DEVICE, ERROR CORRECTION DECODING DEVICE, ERROR CORRECTION ENCODING METHOD, ERROR CORRECTION DECODING METHOD, CONTROL CIRCUIT, AND STORAGE MEDIUM Aug 21, 2024 Pending
Array ( [id] => 20138057 [patent_doc_number] => 20250245101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-31 [patent_title] => MEMORY CONTROL METHOD AND MEMORY STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/810544 [patent_app_country] => US [patent_app_date] => 2024-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18810544 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/810544
MEMORY CONTROL METHOD AND MEMORY STORAGE DEVICE Aug 20, 2024 Pending
Array ( [id] => 20061687 [patent_doc_number] => 20250199909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => MEMORY SYSTEM SUPPORTING MULTI-CHANNEL INTERFACE [patent_app_type] => utility [patent_app_number] => 18/804352 [patent_app_country] => US [patent_app_date] => 2024-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5491 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18804352 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/804352
MEMORY SYSTEM SUPPORTING MULTI-CHANNEL INTERFACE Aug 13, 2024 Pending
Array ( [id] => 19758739 [patent_doc_number] => 20250047304 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => SYNDROME CHECK FUNCTIONALITY TO DIFFERENTIATE BETWEEN ERROR TYPES [patent_app_type] => utility [patent_app_number] => 18/804539 [patent_app_country] => US [patent_app_date] => 2024-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18290 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18804539 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/804539
SYNDROME CHECK FUNCTIONALITY TO DIFFERENTIATE BETWEEN ERROR TYPES Aug 13, 2024 Pending
Array ( [id] => 20609934 [patent_doc_number] => 12585536 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-24 [patent_title] => Memory system [patent_app_type] => utility [patent_app_number] => 18/798040 [patent_app_country] => US [patent_app_date] => 2024-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 0 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18798040 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/798040
Memory system Aug 7, 2024 Issued
Array ( [id] => 20182972 [patent_doc_number] => 20250266930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-21 [patent_title] => SYSTEMS AND METHODS FOR PROBABILISTIC QUADRATURE AMPLITUDE MODULATION (QAM) [patent_app_type] => utility [patent_app_number] => 18/782806 [patent_app_country] => US [patent_app_date] => 2024-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10358 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18782806 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/782806
SYSTEMS AND METHODS FOR PROBABILISTIC QUADRATURE AMPLITUDE MODULATION (QAM) Jul 23, 2024 Pending
Array ( [id] => 20152176 [patent_doc_number] => 20250252014 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-07 [patent_title] => ERROR DETECTION FOR ACTIVATED PAGES IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/783321 [patent_app_country] => US [patent_app_date] => 2024-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7614 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18783321 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/783321
ERROR DETECTION FOR ACTIVATED PAGES IN A MEMORY DEVICE Jul 23, 2024 Pending
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