Search

Ly D. Pham

Examiner (ID: 15722)

Most Active Art Unit
2827
Art Unit(s)
2827, 2818, 2713
Total Applications
2164
Issued Applications
2016
Pending Applications
83
Abandoned Applications
106

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16936114 [patent_doc_number] => 20210202003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => TRACKING OPERATIONS PERFORMED AT A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/020704 [patent_app_country] => US [patent_app_date] => 2020-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9525 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17020704 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/020704
Tracking operations performed at a memory device Sep 13, 2020 Issued
Array ( [id] => 17195872 [patent_doc_number] => 11164637 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-02 [patent_title] => Methods of erasing data in nonvolatile memory devices and nonvolatile memory devices performing the same [patent_app_type] => utility [patent_app_number] => 17/015525 [patent_app_country] => US [patent_app_date] => 2020-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 14320 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17015525 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/015525
Methods of erasing data in nonvolatile memory devices and nonvolatile memory devices performing the same Sep 8, 2020 Issued
Array ( [id] => 17447865 [patent_doc_number] => 20220068370 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => SRAM WITH ADVANCED BURST MODE ADDRESS COMPARATOR [patent_app_type] => utility [patent_app_number] => 17/008433 [patent_app_country] => US [patent_app_date] => 2020-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8051 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17008433 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/008433
SRAM with advanced burst mode address comparator Aug 30, 2020 Issued
Array ( [id] => 16515810 [patent_doc_number] => 20200395068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-17 [patent_title] => 1T-1R ARCHITECTURE FOR RESISTIVE RANDOM ACCESS MEMORY [patent_app_type] => utility [patent_app_number] => 17/008505 [patent_app_country] => US [patent_app_date] => 2020-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5387 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17008505 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/008505
1T-1R architecture for resistive random access memory Aug 30, 2020 Issued
Array ( [id] => 17447895 [patent_doc_number] => 20220068400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => CIRCUIT AND METHOD FOR PROCESS AND TEMPERATURE COMPENSATED READ VOLTAGE FOR NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 17/006510 [patent_app_country] => US [patent_app_date] => 2020-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4621 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17006510 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/006510
Circuit and method for process and temperature compensated read voltage for non-volatile memory Aug 27, 2020 Issued
Array ( [id] => 17424094 [patent_doc_number] => 11257555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-22 [patent_title] => Wear leveling in EEPROM emulator formed of flash memory cells [patent_app_type] => utility [patent_app_number] => 17/006550 [patent_app_country] => US [patent_app_date] => 2020-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6037 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17006550 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/006550
Wear leveling in EEPROM emulator formed of flash memory cells Aug 27, 2020 Issued
Array ( [id] => 17652471 [patent_doc_number] => 11355207 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-07 [patent_title] => Memory device and method of operating the same [patent_app_type] => utility [patent_app_number] => 17/003617 [patent_app_country] => US [patent_app_date] => 2020-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 7719 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17003617 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/003617
Memory device and method of operating the same Aug 25, 2020 Issued
Array ( [id] => 16982395 [patent_doc_number] => 20210226632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/002816 [patent_app_country] => US [patent_app_date] => 2020-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13935 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17002816 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/002816
Semiconductor memory device Aug 25, 2020 Issued
Array ( [id] => 17410004 [patent_doc_number] => 11250900 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-15 [patent_title] => Half density ferroelectric memory and operation [patent_app_type] => utility [patent_app_number] => 17/001296 [patent_app_country] => US [patent_app_date] => 2020-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 12720 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17001296 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/001296
Half density ferroelectric memory and operation Aug 23, 2020 Issued
Array ( [id] => 17771286 [patent_doc_number] => 11403228 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-02 [patent_title] => Memory device page program sequence [patent_app_type] => utility [patent_app_number] => 16/998631 [patent_app_country] => US [patent_app_date] => 2020-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8173 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16998631 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/998631
Memory device page program sequence Aug 19, 2020 Issued
Array ( [id] => 17469970 [patent_doc_number] => 11276452 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-15 [patent_title] => Memory device including a plurality of area having different refresh periods, memory controller controlling the same and memory system including the same [patent_app_type] => utility [patent_app_number] => 16/988478 [patent_app_country] => US [patent_app_date] => 2020-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3996 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16988478 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/988478
Memory device including a plurality of area having different refresh periods, memory controller controlling the same and memory system including the same Aug 6, 2020 Issued
Array ( [id] => 17283919 [patent_doc_number] => 11200959 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-12-14 [patent_title] => Optimization of soft bit windows based on signal and noise characteristics of memory cells [patent_app_type] => utility [patent_app_number] => 16/988343 [patent_app_country] => US [patent_app_date] => 2020-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 14037 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16988343 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/988343
Optimization of soft bit windows based on signal and noise characteristics of memory cells Aug 6, 2020 Issued
Array ( [id] => 17500446 [patent_doc_number] => 11289156 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-29 [patent_title] => Ballistic reversible superconducting memory element [patent_app_type] => utility [patent_app_number] => 16/943613 [patent_app_country] => US [patent_app_date] => 2020-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3773 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16943613 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/943613
Ballistic reversible superconducting memory element Jul 29, 2020 Issued
Array ( [id] => 16637325 [patent_doc_number] => 10915836 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-02-09 [patent_title] => Systems and methods for operating a cognitive automaton [patent_app_type] => utility [patent_app_number] => 16/942345 [patent_app_country] => US [patent_app_date] => 2020-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 13279 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16942345 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/942345
Systems and methods for operating a cognitive automaton Jul 28, 2020 Issued
Array ( [id] => 16888694 [patent_doc_number] => 20210174891 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-10 [patent_title] => MEMORY SYSTEM, INTEGRATED CIRCUIT SYSTEM, AND OPERATION METHOD OF MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 16/939741 [patent_app_country] => US [patent_app_date] => 2020-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5402 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16939741 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/939741
Memory system, integrated circuit system, and operation method of memory system Jul 26, 2020 Issued
Array ( [id] => 16440434 [patent_doc_number] => 20200357761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-12 [patent_title] => SEMICONDUCTOR MEMORY DEVICE STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/938389 [patent_app_country] => US [patent_app_date] => 2020-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3138 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16938389 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/938389
Semiconductor memory device structure Jul 23, 2020 Issued
Array ( [id] => 17165943 [patent_doc_number] => 11152051 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-10-19 [patent_title] => Real time memory interface variation tracking [patent_app_type] => utility [patent_app_number] => 16/937184 [patent_app_country] => US [patent_app_date] => 2020-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 5818 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16937184 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/937184
Real time memory interface variation tracking Jul 22, 2020 Issued
Array ( [id] => 17270153 [patent_doc_number] => 11195581 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-12-07 [patent_title] => Memory cell, memory array and operation method using the same [patent_app_type] => utility [patent_app_number] => 16/935349 [patent_app_country] => US [patent_app_date] => 2020-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 4575 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16935349 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/935349
Memory cell, memory array and operation method using the same Jul 21, 2020 Issued
Array ( [id] => 17165947 [patent_doc_number] => 11152055 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-10-19 [patent_title] => Apparatuses including threshold voltage compensated sense amplifiers and methods for compensating same [patent_app_type] => utility [patent_app_number] => 16/934909 [patent_app_country] => US [patent_app_date] => 2020-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 8745 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16934909 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/934909
Apparatuses including threshold voltage compensated sense amplifiers and methods for compensating same Jul 20, 2020 Issued
Array ( [id] => 19720080 [patent_doc_number] => 12205623 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Cache memory and method of its manufacture [patent_app_type] => utility [patent_app_number] => 18/004968 [patent_app_country] => US [patent_app_date] => 2020-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3500 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18004968 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/004968
Cache memory and method of its manufacture Jul 19, 2020 Issued
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