Search

Ly D. Pham

Examiner (ID: 15722)

Most Active Art Unit
2827
Art Unit(s)
2827, 2818, 2713
Total Applications
2164
Issued Applications
2016
Pending Applications
83
Abandoned Applications
106

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10178679 [patent_doc_number] => 09208891 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-08 [patent_title] => 'Memory array with power-efficient read architecture' [patent_app_type] => utility [patent_app_number] => 14/462078 [patent_app_country] => US [patent_app_date] => 2014-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6301 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14462078 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/462078
Memory array with power-efficient read architecture Aug 17, 2014 Issued
Array ( [id] => 10525351 [patent_doc_number] => 09251869 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-02 [patent_title] => 'Deep sleep wakeup of multi-bank memory' [patent_app_type] => utility [patent_app_number] => 14/460972 [patent_app_country] => US [patent_app_date] => 2014-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2169 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14460972 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/460972
Deep sleep wakeup of multi-bank memory Aug 14, 2014 Issued
Array ( [id] => 11489256 [patent_doc_number] => 09595328 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-14 [patent_title] => 'State-changeable device' [patent_app_type] => utility [patent_app_number] => 14/914030 [patent_app_country] => US [patent_app_date] => 2014-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5733 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14914030 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/914030
State-changeable device Aug 13, 2014 Issued
Array ( [id] => 10010297 [patent_doc_number] => 09053820 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-09 [patent_title] => 'Internal data load for non-volatile storage' [patent_app_type] => utility [patent_app_number] => 14/456984 [patent_app_country] => US [patent_app_date] => 2014-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 34 [patent_no_of_words] => 15589 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14456984 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/456984
Internal data load for non-volatile storage Aug 10, 2014 Issued
Array ( [id] => 10696644 [patent_doc_number] => 20160042790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-11 [patent_title] => 'Flash Memory System With EEPROM Functionality' [patent_app_type] => utility [patent_app_number] => 14/455698 [patent_app_country] => US [patent_app_date] => 2014-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 10363 [patent_no_of_claims] => 87 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14455698 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/455698
Flash memory system with EEPROM functionality Aug 7, 2014 Issued
Array ( [id] => 9915786 [patent_doc_number] => 20150070991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-12 [patent_title] => 'NONVOLATILE MEMORY SYSTEMS WITH EMBEDDED FAST READ AND WRITE MEMORIES' [patent_app_type] => utility [patent_app_number] => 14/335160 [patent_app_country] => US [patent_app_date] => 2014-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 2139 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14335160 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/335160
Nonvolatile memory systems with embedded fast read and write memories Jul 17, 2014 Issued
Array ( [id] => 10563289 [patent_doc_number] => 09286970 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-15 [patent_title] => 'Memory circuit for pre-charging and write driving' [patent_app_type] => utility [patent_app_number] => 14/326124 [patent_app_country] => US [patent_app_date] => 2014-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5091 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14326124 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/326124
Memory circuit for pre-charging and write driving Jul 7, 2014 Issued
Array ( [id] => 10508231 [patent_doc_number] => 09236107 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-01-12 [patent_title] => 'FRAM cell with cross point access' [patent_app_type] => utility [patent_app_number] => 14/324048 [patent_app_country] => US [patent_app_date] => 2014-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 5830 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14324048 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/324048
FRAM cell with cross point access Jul 2, 2014 Issued
Array ( [id] => 9997549 [patent_doc_number] => 09042160 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-05-26 [patent_title] => 'Memory device with resistive random access memory (ReRAM)' [patent_app_type] => utility [patent_app_number] => 14/323704 [patent_app_country] => US [patent_app_date] => 2014-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 12376 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14323704 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/323704
Memory device with resistive random access memory (ReRAM) Jul 2, 2014 Issued
Array ( [id] => 11333529 [patent_doc_number] => 09524778 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-20 [patent_title] => 'Device selection schemes in multi chip package NAND flash memory system' [patent_app_type] => utility [patent_app_number] => 14/321987 [patent_app_country] => US [patent_app_date] => 2014-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 24 [patent_no_of_words] => 7544 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14321987 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/321987
Device selection schemes in multi chip package NAND flash memory system Jul 1, 2014 Issued
Array ( [id] => 10099693 [patent_doc_number] => 09136008 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-09-15 [patent_title] => 'Flash memory apparatus and data reading method thereof' [patent_app_type] => utility [patent_app_number] => 14/320664 [patent_app_country] => US [patent_app_date] => 2014-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2928 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14320664 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/320664
Flash memory apparatus and data reading method thereof Jun 30, 2014 Issued
Array ( [id] => 10617417 [patent_doc_number] => 09336863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-10 [patent_title] => 'Dual write wordline memory cell' [patent_app_type] => utility [patent_app_number] => 14/320024 [patent_app_country] => US [patent_app_date] => 2014-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9450 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14320024 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/320024
Dual write wordline memory cell Jun 29, 2014 Issued
Array ( [id] => 10151600 [patent_doc_number] => 09183896 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-11-10 [patent_title] => 'Deep sleep wakeup of multi-bank memory' [patent_app_type] => utility [patent_app_number] => 14/318920 [patent_app_country] => US [patent_app_date] => 2014-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2169 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14318920 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/318920
Deep sleep wakeup of multi-bank memory Jun 29, 2014 Issued
Array ( [id] => 10131769 [patent_doc_number] => 09165610 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-10-20 [patent_title] => 'Non-volatile memory cell arrays and methods of fabricating semiconductor devices' [patent_app_type] => utility [patent_app_number] => 14/318766 [patent_app_country] => US [patent_app_date] => 2014-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3494 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14318766 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/318766
Non-volatile memory cell arrays and methods of fabricating semiconductor devices Jun 29, 2014 Issued
Array ( [id] => 10518593 [patent_doc_number] => 09245647 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-26 [patent_title] => 'One-time programmable memory cell and circuit' [patent_app_type] => utility [patent_app_number] => 14/320256 [patent_app_country] => US [patent_app_date] => 2014-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8619 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 492 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14320256 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/320256
One-time programmable memory cell and circuit Jun 29, 2014 Issued
Array ( [id] => 10495042 [patent_doc_number] => 20150380064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'SRAM WITH TWO-LEVEL VOLTAGE REGULATOR' [patent_app_type] => utility [patent_app_number] => 14/320074 [patent_app_country] => US [patent_app_date] => 2014-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3401 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14320074 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/320074
SRAM with two-level voltage regulator Jun 29, 2014 Issued
Array ( [id] => 10495073 [patent_doc_number] => 20150380095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'TECHNIQUES FOR IMPROVING RELIABILITY AND PERFORMANCE OF PARTIALLY WRITTEN MEMORY BLOCKS IN MODERN FLASH MEMORY SYSTEMS' [patent_app_type] => utility [patent_app_number] => 14/318572 [patent_app_country] => US [patent_app_date] => 2014-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7385 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14318572 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/318572
Techniques for improving reliability and performance of partially written memory blocks in modern flash memory systems Jun 26, 2014 Issued
Array ( [id] => 10086077 [patent_doc_number] => 09123428 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-01 [patent_title] => 'E-fuse array circuit' [patent_app_type] => utility [patent_app_number] => 14/318021 [patent_app_country] => US [patent_app_date] => 2014-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3129 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14318021 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/318021
E-fuse array circuit Jun 26, 2014 Issued
Array ( [id] => 10010776 [patent_doc_number] => 09054307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-09 [patent_title] => 'Resistive random access memory cells having metal alloy current limiting layers' [patent_app_type] => utility [patent_app_number] => 14/317155 [patent_app_country] => US [patent_app_date] => 2014-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 12573 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14317155 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/317155
Resistive random access memory cells having metal alloy current limiting layers Jun 26, 2014 Issued
Array ( [id] => 11781916 [patent_doc_number] => 09391119 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-12 [patent_title] => 'Non-volatile random access memory devices with shared transistor configuration and methods of forming the same' [patent_app_type] => utility [patent_app_number] => 14/310460 [patent_app_country] => US [patent_app_date] => 2014-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4325 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14310460 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/310460
Non-volatile random access memory devices with shared transistor configuration and methods of forming the same Jun 19, 2014 Issued
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