Search

Ly D. Pham

Examiner (ID: 15722)

Most Active Art Unit
2827
Art Unit(s)
2827, 2818, 2713
Total Applications
2164
Issued Applications
2016
Pending Applications
83
Abandoned Applications
106

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10295465 [patent_doc_number] => 20150180464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'CIRCUIT AND METHOD FOR BODY BIASING' [patent_app_type] => utility [patent_app_number] => 14/256799 [patent_app_country] => US [patent_app_date] => 2014-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2819 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14256799 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/256799
Circuit and method for body biasing Apr 17, 2014 Issued
Array ( [id] => 9655387 [patent_doc_number] => 20140226392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-14 [patent_title] => 'Arrays Of Vertically Stacked Tiers Of Non-Volatile Cross Point Memory Cells and Methods Of Reading A Data Value Stored By An Array Of Vertically Stacked Tiers Of Non-Volatile Cross Point Memory Cells' [patent_app_type] => utility [patent_app_number] => 14/255283 [patent_app_country] => US [patent_app_date] => 2014-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 48 [patent_no_of_words] => 10762 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14255283 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/255283
Arrays of vertically stacked tiers of non-volatile cross point memory cells Apr 16, 2014 Issued
Array ( [id] => 10708225 [patent_doc_number] => 20160054372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-25 [patent_title] => 'REAL TIME, AUTOMATIC DIAGNOSTIC SYSTEM AND METHOD FOR ELECTRIC NETWORKS' [patent_app_type] => utility [patent_app_number] => 14/781120 [patent_app_country] => US [patent_app_date] => 2014-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9666 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14781120 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/781120
REAL TIME, AUTOMATIC DIAGNOSTIC SYSTEM AND METHOD FOR ELECTRIC NETWORKS Apr 8, 2014 Abandoned
Array ( [id] => 10302401 [patent_doc_number] => 20150187401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-02 [patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/244153 [patent_app_country] => US [patent_app_date] => 2014-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4161 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14244153 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/244153
Semiconductor memory apparatus Apr 2, 2014 Issued
Array ( [id] => 10261490 [patent_doc_number] => 20150146487 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-28 [patent_title] => 'NON-VOLATILE MEMORY DEVICE AND METHOD FOR ERASING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/243617 [patent_app_country] => US [patent_app_date] => 2014-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7285 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14243617 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/243617
Non-volatile memory device and method for erasing the same Apr 1, 2014 Issued
Array ( [id] => 10277067 [patent_doc_number] => 20150162064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-11 [patent_title] => 'REFRESH CONTROL CIRCUIT OF SEMICONDUCTOR APPARATUS AND REFRESH METHOD USING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/243651 [patent_app_country] => US [patent_app_date] => 2014-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4361 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14243651 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/243651
Refresh control circuit of semiconductor apparatus and refresh method using the same Apr 1, 2014 Issued
Array ( [id] => 9655413 [patent_doc_number] => 20140226419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-14 [patent_title] => 'SEMICONDUCTOR APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/243559 [patent_app_country] => US [patent_app_date] => 2014-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3338 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14243559 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/243559
Semiconductor apparatus Apr 1, 2014 Issued
Array ( [id] => 10302422 [patent_doc_number] => 20150187422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-02 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/228434 [patent_app_country] => US [patent_app_date] => 2014-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9299 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14228434 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/228434
Semiconductor device Mar 27, 2014 Issued
Array ( [id] => 9577058 [patent_doc_number] => 08767485 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-07-01 [patent_title] => 'Operation method of a supply voltage generation circuit used for a memory array' [patent_app_type] => utility [patent_app_number] => 14/225432 [patent_app_country] => US [patent_app_date] => 2014-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4560 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14225432 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/225432
Operation method of a supply voltage generation circuit used for a memory array Mar 25, 2014 Issued
Array ( [id] => 9650415 [patent_doc_number] => 08804440 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-08-12 [patent_title] => 'Memory for a voltage regulator circuit' [patent_app_type] => utility [patent_app_number] => 14/225435 [patent_app_country] => US [patent_app_date] => 2014-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4717 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14225435 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/225435
Memory for a voltage regulator circuit Mar 25, 2014 Issued
Array ( [id] => 9811141 [patent_doc_number] => 20150023086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-22 [patent_title] => 'MULTIPORT MEMORY CELL HAVING IMPROVED DENSITY AREA' [patent_app_type] => utility [patent_app_number] => 14/216855 [patent_app_country] => US [patent_app_date] => 2014-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4223 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14216855 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/216855
Multiport memory cell having improved density area Mar 16, 2014 Issued
Array ( [id] => 10099701 [patent_doc_number] => 09136016 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-15 [patent_title] => 'Semiconductor memory apparatus' [patent_app_type] => utility [patent_app_number] => 14/210654 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 23 [patent_no_of_words] => 7405 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14210654 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/210654
Semiconductor memory apparatus Mar 13, 2014 Issued
Array ( [id] => 10502223 [patent_doc_number] => 09230625 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-05 [patent_title] => 'Magnetic memory, spin element, and spin MOS transistor' [patent_app_type] => utility [patent_app_number] => 14/204422 [patent_app_country] => US [patent_app_date] => 2014-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 23 [patent_no_of_words] => 10137 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14204422 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/204422
Magnetic memory, spin element, and spin MOS transistor Mar 10, 2014 Issued
Array ( [id] => 9907805 [patent_doc_number] => 20150063006 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-05 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/203296 [patent_app_country] => US [patent_app_date] => 2014-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3605 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14203296 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/203296
Semiconductor device Mar 9, 2014 Issued
Array ( [id] => 9856393 [patent_doc_number] => 20150036410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-05 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/202630 [patent_app_country] => US [patent_app_date] => 2014-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 15871 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14202630 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/202630
Semiconductor storage device Mar 9, 2014 Issued
Array ( [id] => 10010245 [patent_doc_number] => 09053768 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-09 [patent_title] => 'Systems and methods of pipelined output latching involving synchronous memory arrays' [patent_app_type] => utility [patent_app_number] => 14/203416 [patent_app_country] => US [patent_app_date] => 2014-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 10531 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14203416 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/203416
Systems and methods of pipelined output latching involving synchronous memory arrays Mar 9, 2014 Issued
Array ( [id] => 9915756 [patent_doc_number] => 20150070961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-12 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/203458 [patent_app_country] => US [patent_app_date] => 2014-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 13161 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14203458 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/203458
Semiconductor storage device Mar 9, 2014 Issued
Array ( [id] => 9915801 [patent_doc_number] => 20150071006 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-12 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/202361 [patent_app_country] => US [patent_app_date] => 2014-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7732 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14202361 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/202361
Semiconductor storage device Mar 9, 2014 Issued
Array ( [id] => 10369178 [patent_doc_number] => 20150254183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-10 [patent_title] => 'INTER-CHIP INTERCONNECT PROTOCOL FOR A MULTI-CHIP SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/201513 [patent_app_country] => US [patent_app_date] => 2014-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 21872 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14201513 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/201513
Inter-chip interconnect protocol for a multi-chip system Mar 6, 2014 Issued
Array ( [id] => 9915766 [patent_doc_number] => 20150070971 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-12 [patent_title] => 'RESISTANCE CHANGE MEMORY' [patent_app_type] => utility [patent_app_number] => 14/201706 [patent_app_country] => US [patent_app_date] => 2014-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9713 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14201706 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/201706
RESISTANCE CHANGE MEMORY Mar 6, 2014 Abandoned
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