
Ly D. Pham
Examiner (ID: 15722)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2827, 2818, 2713 |
| Total Applications | 2164 |
| Issued Applications | 2016 |
| Pending Applications | 83 |
| Abandoned Applications | 106 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8428515
[patent_doc_number] => 20120250390
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-10-04
[patent_title] => 'MEMORY CELL AND MEMORY DEVICE INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/432294
[patent_app_country] => US
[patent_app_date] => 2012-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7944
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13432294
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/432294 | Memory cell and memory device including the same | Mar 27, 2012 | Issued |
Array
(
[id] => 10576745
[patent_doc_number] => 09299395
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-03-29
[patent_title] => 'Methods and systems to selectively boost an operating voltage of, and controls to an 8T bit-cell array and/or other logic blocks'
[patent_app_type] => utility
[patent_app_number] => 14/350546
[patent_app_country] => US
[patent_app_date] => 2012-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 16
[patent_no_of_words] => 5897
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14350546
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/350546 | Methods and systems to selectively boost an operating voltage of, and controls to an 8T bit-cell array and/or other logic blocks | Mar 25, 2012 | Issued |
Array
(
[id] => 8415797
[patent_doc_number] => 20120243297
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-09-27
[patent_title] => 'RESISTANCE CHANGE TYPE MEMORY'
[patent_app_type] => utility
[patent_app_number] => 13/428312
[patent_app_country] => US
[patent_app_date] => 2012-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 14173
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13428312
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/428312 | RESISTANCE CHANGE TYPE MEMORY | Mar 22, 2012 | Abandoned |
Array
(
[id] => 10959625
[patent_doc_number] => 20140362652
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-12-11
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR ACCESSING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/355120
[patent_app_country] => US
[patent_app_date] => 2012-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2317
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14355120
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/355120 | Semiconductor memory device and method for accessing the same | Mar 21, 2012 | Issued |
Array
(
[id] => 9101140
[patent_doc_number] => 08565029
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-10-22
[patent_title] => 'Supply adjustment in memory devices configured for stacked arrangements'
[patent_app_type] => utility
[patent_app_number] => 13/425636
[patent_app_country] => US
[patent_app_date] => 2012-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 17813
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13425636
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/425636 | Supply adjustment in memory devices configured for stacked arrangements | Mar 20, 2012 | Issued |
Array
(
[id] => 9415225
[patent_doc_number] => 08699271
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-04-15
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 13/424658
[patent_app_country] => US
[patent_app_date] => 2012-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 25
[patent_no_of_words] => 12384
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13424658
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/424658 | Semiconductor memory device | Mar 19, 2012 | Issued |
Array
(
[id] => 9577011
[patent_doc_number] => 08767438
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-07-01
[patent_title] => 'Memelectronic device'
[patent_app_type] => utility
[patent_app_number] => 13/424034
[patent_app_country] => US
[patent_app_date] => 2012-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 14
[patent_no_of_words] => 4796
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13424034
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/424034 | Memelectronic device | Mar 18, 2012 | Issued |
Array
(
[id] => 8276499
[patent_doc_number] => 20120170370
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-05
[patent_title] => 'NONVOLATILE MEMORY DEVICE AND NONVOLATILE MEMORY SYSTEM EMPLOYING SAME'
[patent_app_type] => utility
[patent_app_number] => 13/419732
[patent_app_country] => US
[patent_app_date] => 2012-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6786
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13419732
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/419732 | Nonvolatile memory device and nonvolatile memory system employing same | Mar 13, 2012 | Issued |
Array
(
[id] => 8276491
[patent_doc_number] => 20120170362
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-05
[patent_title] => 'METHOD AND SYSTEM FOR PROVIDING DUAL MAGNETIC TUNNELING JUNCTIONS USABLE IN SPIN TRANSFER TORQUE MAGNETIC MEMORIES'
[patent_app_type] => utility
[patent_app_number] => 13/415261
[patent_app_country] => US
[patent_app_date] => 2012-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 10339
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13415261
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/415261 | Method and system for providing dual magnetic tunneling junctions usable in spin transfer torque magnetic memories | Mar 7, 2012 | Issued |
Array
(
[id] => 8263668
[patent_doc_number] => 20120163078
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-28
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE CAPABLE OF SUPPRESSING PEAK CURRENT'
[patent_app_type] => utility
[patent_app_number] => 13/409329
[patent_app_country] => US
[patent_app_date] => 2012-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 12404
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13409329
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/409329 | Semiconductor memory device capable of suppressing peak current | Feb 29, 2012 | Issued |
Array
(
[id] => 9377300
[patent_doc_number] => 08681570
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-03-25
[patent_title] => 'Methods and systems for memory devices with asymmetric switching characteristics'
[patent_app_type] => utility
[patent_app_number] => 13/404212
[patent_app_country] => US
[patent_app_date] => 2012-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 2640
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13404212
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/404212 | Methods and systems for memory devices with asymmetric switching characteristics | Feb 23, 2012 | Issued |
Array
(
[id] => 9324932
[patent_doc_number] => 08659962
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-02-25
[patent_title] => 'Semiconductor device, semiconductor system having the same and operating method thereof'
[patent_app_type] => utility
[patent_app_number] => 13/404446
[patent_app_country] => US
[patent_app_date] => 2012-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 8847
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13404446
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/404446 | Semiconductor device, semiconductor system having the same and operating method thereof | Feb 23, 2012 | Issued |
Array
(
[id] => 9002030
[patent_doc_number] => 20130223155
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-29
[patent_title] => 'TEMPERATURE BASED COMPENSATION DURING VERIFY OPERATIONS FOR NON-VOLATILE STORAGE'
[patent_app_type] => utility
[patent_app_number] => 13/403934
[patent_app_country] => US
[patent_app_date] => 2012-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 17047
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13403934
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/403934 | Temperature based compensation during verify operations for non-volatile storage | Feb 22, 2012 | Issued |
Array
(
[id] => 8207648
[patent_doc_number] => 20120127771
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-24
[patent_title] => 'MULTI-WAFER 3D CAM CELL'
[patent_app_type] => utility
[patent_app_number] => 13/364607
[patent_app_country] => US
[patent_app_date] => 2012-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6770
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0127/20120127771.pdf
[firstpage_image] =>[orig_patent_app_number] => 13364607
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/364607 | Multi-wafer 3D CAM cell | Feb 1, 2012 | Issued |
Array
(
[id] => 9087823
[patent_doc_number] => 08559258
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-10-15
[patent_title] => 'Self-refresh adjustment in memory devices configured for stacked arrangements'
[patent_app_type] => utility
[patent_app_number] => 13/357384
[patent_app_country] => US
[patent_app_date] => 2012-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 17810
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13357384
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/357384 | Self-refresh adjustment in memory devices configured for stacked arrangements | Jan 23, 2012 | Issued |
Array
(
[id] => 8743893
[patent_doc_number] => 20130083610
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-04-04
[patent_title] => 'ENERGY EFFICIENT MEMORY WITH RECONFIGURABLE DECODING'
[patent_app_type] => utility
[patent_app_number] => 13/357492
[patent_app_country] => US
[patent_app_date] => 2012-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7270
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13357492
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/357492 | Energy efficient memory with reconfigurable decoding | Jan 23, 2012 | Issued |
Array
(
[id] => 9498300
[patent_doc_number] => 08737129
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-05-27
[patent_title] => 'Nonvolatile memory device and read method thereof'
[patent_app_type] => utility
[patent_app_number] => 13/355834
[patent_app_country] => US
[patent_app_date] => 2012-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 39
[patent_no_of_words] => 13451
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13355834
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/355834 | Nonvolatile memory device and read method thereof | Jan 22, 2012 | Issued |
Array
(
[id] => 8938634
[patent_doc_number] => 20130188431
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-07-25
[patent_title] => 'TEMPERATURE COMPENSATION OF CONDUCTIVE BRIDGE MEMORY ARRAYS'
[patent_app_type] => utility
[patent_app_number] => 13/354796
[patent_app_country] => US
[patent_app_date] => 2012-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 13160
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13354796
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/354796 | Temperature compensation of conductive bridge memory arrays | Jan 19, 2012 | Issued |
Array
(
[id] => 8912341
[patent_doc_number] => 08484417
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-07-09
[patent_title] => 'Location updates for a distributed data store'
[patent_app_type] => utility
[patent_app_number] => 13/337093
[patent_app_country] => US
[patent_app_date] => 2011-12-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 12033
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13337093
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/337093 | Location updates for a distributed data store | Dec 23, 2011 | Issued |
Array
(
[id] => 8644138
[patent_doc_number] => 08369132
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-02-05
[patent_title] => 'Methods of programming and erasing programmable metallization cells (PMCs)'
[patent_app_type] => utility
[patent_app_number] => 13/337004
[patent_app_country] => US
[patent_app_date] => 2011-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 44
[patent_no_of_words] => 16997
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13337004
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/337004 | Methods of programming and erasing programmable metallization cells (PMCs) | Dec 22, 2011 | Issued |