| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3435993
[patent_doc_number] => 05404360
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-04
[patent_title] => 'Simulator for simulating circuit operation'
[patent_app_type] => 1
[patent_app_number] => 7/846954
[patent_app_country] => US
[patent_app_date] => 1992-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 5623
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 531
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/404/05404360.pdf
[firstpage_image] =>[orig_patent_app_number] => 846954
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/846954 | Simulator for simulating circuit operation | Mar 5, 1992 | Issued |
Array
(
[id] => 3013333
[patent_doc_number] => 05371743
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-12-06
[patent_title] => 'On-line module replacement in a multiple module data processing system'
[patent_app_type] => 1
[patent_app_number] => 7/847638
[patent_app_country] => US
[patent_app_date] => 1992-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 3914
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/371/05371743.pdf
[firstpage_image] =>[orig_patent_app_number] => 847638
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/847638 | On-line module replacement in a multiple module data processing system | Mar 5, 1992 | Issued |
Array
(
[id] => 2909472
[patent_doc_number] => 05245617
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-09-14
[patent_title] => 'First-in, first-out memory circuit'
[patent_app_type] => 1
[patent_app_number] => 7/847952
[patent_app_country] => US
[patent_app_date] => 1992-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 6371
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/245/05245617.pdf
[firstpage_image] =>[orig_patent_app_number] => 847952
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/847952 | First-in, first-out memory circuit | Mar 5, 1992 | Issued |
| 07/839749 | TEST DATA FORMATTER | Feb 19, 1992 | Abandoned |
Array
(
[id] => 3122520
[patent_doc_number] => 05408643
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-18
[patent_title] => 'Watchdog timer with a non-masked interrupt masked only when a watchdog timer has been cleared'
[patent_app_type] => 1
[patent_app_number] => 7/830421
[patent_app_country] => US
[patent_app_date] => 1992-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4483
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 473
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/408/05408643.pdf
[firstpage_image] =>[orig_patent_app_number] => 830421
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/830421 | Watchdog timer with a non-masked interrupt masked only when a watchdog timer has been cleared | Feb 2, 1992 | Issued |
Array
(
[id] => 2903370
[patent_doc_number] => 05210758
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-05-11
[patent_title] => 'Means and method for detecting and correcting microinstruction errors'
[patent_app_type] => 1
[patent_app_number] => 7/816791
[patent_app_country] => US
[patent_app_date] => 1992-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1854
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 232
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/210/05210758.pdf
[firstpage_image] =>[orig_patent_app_number] => 816791
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/816791 | Means and method for detecting and correcting microinstruction errors | Jan 2, 1992 | Issued |
| 07/814944 | APPARATUS FOR REVERSIBLY STORING DIGITAL DATA AS ERROR PROTECTED PRO- DUCT CODEWORDS ON A MULTITRACK RECORD CARRIER AND APPARATUS FOR RE- COVERING THE DIGITAL DATA FROM THE RECORDED PRODUCT CODEWORDS | Dec 29, 1991 | Abandoned |
Array
(
[id] => 3637363
[patent_doc_number] => 05621738
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-15
[patent_title] => 'Method for programming flash EEPROM devices'
[patent_app_type] => 1
[patent_app_number] => 7/805328
[patent_app_country] => US
[patent_app_date] => 1991-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2054
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/621/05621738.pdf
[firstpage_image] =>[orig_patent_app_number] => 805328
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/805328 | Method for programming flash EEPROM devices | Dec 9, 1991 | Issued |
Array
(
[id] => 3104633
[patent_doc_number] => 05369650
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-11-29
[patent_title] => 'Error detection and correction apparatus in a BY-4 RAM Device'
[patent_app_type] => 1
[patent_app_number] => 7/797515
[patent_app_country] => US
[patent_app_date] => 1991-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 3545
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 353
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/369/05369650.pdf
[firstpage_image] =>[orig_patent_app_number] => 797515
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/797515 | Error detection and correction apparatus in a BY-4 RAM Device | Nov 21, 1991 | Issued |
Array
(
[id] => 3433609
[patent_doc_number] => 05422890
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-06-06
[patent_title] => 'Method for dynamically measuring computer disk error rates'
[patent_app_type] => 1
[patent_app_number] => 7/796051
[patent_app_country] => US
[patent_app_date] => 1991-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 12
[patent_no_of_words] => 8527
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 350
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/422/05422890.pdf
[firstpage_image] =>[orig_patent_app_number] => 796051
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/796051 | Method for dynamically measuring computer disk error rates | Nov 18, 1991 | Issued |
| 07/790969 | MICROCONTROLLER WITH FUSE-EMULATING LATCHES | Nov 11, 1991 | Abandoned |
Array
(
[id] => 2923203
[patent_doc_number] => 05228046
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-07-13
[patent_title] => 'Fault tolerant computer memory systems and components employing dual level error correction and detection with disablement feature'
[patent_app_type] => 1
[patent_app_number] => 7/790797
[patent_app_country] => US
[patent_app_date] => 1991-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4231
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/228/05228046.pdf
[firstpage_image] =>[orig_patent_app_number] => 790797
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/790797 | Fault tolerant computer memory systems and components employing dual level error correction and detection with disablement feature | Nov 11, 1991 | Issued |
Array
(
[id] => 3104597
[patent_doc_number] => 05369648
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-11-29
[patent_title] => 'Built-in self-test circuit'
[patent_app_type] => 1
[patent_app_number] => 7/789553
[patent_app_country] => US
[patent_app_date] => 1991-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3826
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/369/05369648.pdf
[firstpage_image] =>[orig_patent_app_number] => 789553
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/789553 | Built-in self-test circuit | Nov 7, 1991 | Issued |
Array
(
[id] => 3104567
[patent_doc_number] => 05313475
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-05-17
[patent_title] => 'ECC function with self-contained high performance partial write or read/modify/write and parity look-ahead interface scheme'
[patent_app_type] => 1
[patent_app_number] => 7/785558
[patent_app_country] => US
[patent_app_date] => 1991-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 4682
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 234
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/313/05313475.pdf
[firstpage_image] =>[orig_patent_app_number] => 785558
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/785558 | ECC function with self-contained high performance partial write or read/modify/write and parity look-ahead interface scheme | Oct 30, 1991 | Issued |
Array
(
[id] => 3064944
[patent_doc_number] => 05325519
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-06-28
[patent_title] => 'Fault tolerant computer with archival rollback capabilities'
[patent_app_type] => 1
[patent_app_number] => 7/779397
[patent_app_country] => US
[patent_app_date] => 1991-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 9
[patent_no_of_words] => 4779
[patent_no_of_claims] => 46
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/325/05325519.pdf
[firstpage_image] =>[orig_patent_app_number] => 779397
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/779397 | Fault tolerant computer with archival rollback capabilities | Oct 17, 1991 | Issued |
| 07/779515 | SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING CPU, PERIPHERAL CIRCUITS AND MEANS FOR SELECTING THE CPU OR A PERIPHERAL CIRCUIT IN A TEST MODE | Oct 17, 1991 | Abandoned |
| 07/778386 | SYSTEM FOR AUTOMATICALLY MONITORING COPIERS FROM A REMOTE LOCATION | Oct 15, 1991 | Abandoned |
| 07/760173 | DATA INTEGRITY FEATURES FOR A SORT ACCELERATOR | Sep 15, 1991 | Abandoned |
| 07/756546 | ERROR CORRECTING APPARATUS | Sep 8, 1991 | Abandoned |
Array
(
[id] => 3503403
[patent_doc_number] => 05537423
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-16
[patent_title] => 'Modular multiple error correcting code system'
[patent_app_type] => 1
[patent_app_number] => 7/748155
[patent_app_country] => US
[patent_app_date] => 1991-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 6200
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/537/05537423.pdf
[firstpage_image] =>[orig_patent_app_number] => 748155
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/748155 | Modular multiple error correcting code system | Aug 20, 1991 | Issued |