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Ly T. Tran

Examiner (ID: 4339)

Most Active Art Unit
2853
Art Unit(s)
2853
Total Applications
364
Issued Applications
310
Pending Applications
5
Abandoned Applications
49

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20369596 [patent_doc_number] => 20250359408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-20 [patent_title] => MULTI-COLOR LED PIXEL UNIT AND MICRO-LED DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 19/285653 [patent_app_country] => US [patent_app_date] => 2025-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8193 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19285653 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/285653
MULTI-COLOR LED PIXEL UNIT AND MICRO-LED DISPLAY PANEL Jul 29, 2025 Pending
Array ( [id] => 20163010 [patent_doc_number] => 12389667 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Fin field-effect transistor device and method [patent_app_type] => utility [patent_app_number] => 18/741063 [patent_app_country] => US [patent_app_date] => 2024-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 4675 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18741063 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/741063
Fin field-effect transistor device and method Jun 11, 2024 Issued
Array ( [id] => 19470808 [patent_doc_number] => 20240324478 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => RRAM BOTTOM ELECTRODE [patent_app_type] => utility [patent_app_number] => 18/732725 [patent_app_country] => US [patent_app_date] => 2024-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7542 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18732725 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/732725
RRAM bottom electrode Jun 3, 2024 Issued
Array ( [id] => 20082560 [patent_doc_number] => 12356658 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Semiconductor structure and method of forming the same [patent_app_type] => utility [patent_app_number] => 18/669565 [patent_app_country] => US [patent_app_date] => 2024-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 4487 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18669565 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/669565
Semiconductor structure and method of forming the same May 20, 2024 Issued
Array ( [id] => 19384825 [patent_doc_number] => 20240274695 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => MULTI-LAYER DIELECTRIC REFILL FOR PROFILE CONTROL IN SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/644330 [patent_app_country] => US [patent_app_date] => 2024-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7406 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18644330 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/644330
Multi-layer dielectric refill for profile control in semiconductor devices Apr 23, 2024 Issued
Array ( [id] => 19349404 [patent_doc_number] => 20240258368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => BURIED GRID WITH SHIELD IN WIDE BAND GAP MATERIAL [patent_app_type] => utility [patent_app_number] => 18/631641 [patent_app_country] => US [patent_app_date] => 2024-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4530 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18631641 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/631641
Buried grid with shield in wide band gap material Apr 9, 2024 Issued
Array ( [id] => 19407033 [patent_doc_number] => 20240290544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => A STRUCTURE AND METHODS OF FORMING THE STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/627931 [patent_app_country] => US [patent_app_date] => 2024-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8266 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18627931 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/627931
Structure and methods of forming the structure Apr 4, 2024 Issued
Array ( [id] => 19335730 [patent_doc_number] => 20240250160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => LATERAL FIN STATIC INDUCTION TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/623766 [patent_app_country] => US [patent_app_date] => 2024-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14130 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18623766 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/623766
Lateral fin static induction transistor Mar 31, 2024 Issued
Array ( [id] => 19812532 [patent_doc_number] => 12243945 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-04 [patent_title] => Semiconductor device and method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 18/619261 [patent_app_country] => US [patent_app_date] => 2024-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 107 [patent_no_of_words] => 38895 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18619261 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/619261
Semiconductor device and method for manufacturing semiconductor device Mar 27, 2024 Issued
Array ( [id] => 19305633 [patent_doc_number] => 20240234213 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => FIN ISOLATION STRUCTURE FOR FINFET AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/614985 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7099 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18614985 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/614985
Fin isolation structure for FinFET and method of forming the same Mar 24, 2024 Issued
Array ( [id] => 19285980 [patent_doc_number] => 20240222457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => Semiconductor structure [patent_app_type] => utility [patent_app_number] => 18/608949 [patent_app_country] => US [patent_app_date] => 2024-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2109 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18608949 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/608949
Semiconductor structure Mar 18, 2024 Issued
Array ( [id] => 19253065 [patent_doc_number] => 20240204062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/592203 [patent_app_country] => US [patent_app_date] => 2024-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12980 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18592203 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/592203
SEMICONDUCTOR DEVICE Feb 28, 2024 Pending
Array ( [id] => 19679436 [patent_doc_number] => 12191309 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-07 [patent_title] => Method to induce strain in finFET channels from an adjacent region [patent_app_type] => utility [patent_app_number] => 18/589774 [patent_app_country] => US [patent_app_date] => 2024-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 29 [patent_no_of_words] => 7560 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18589774 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/589774
Method to induce strain in finFET channels from an adjacent region Feb 27, 2024 Issued
Array ( [id] => 20276465 [patent_doc_number] => 12446254 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-14 [patent_title] => Semiconductor device and methods of forming same [patent_app_type] => utility [patent_app_number] => 18/440071 [patent_app_country] => US [patent_app_date] => 2024-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 29 [patent_no_of_words] => 3572 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18440071 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/440071
Semiconductor device and methods of forming same Feb 12, 2024 Issued
Array ( [id] => 19394902 [patent_doc_number] => 20240284772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => MANUFACTURING DEVICE OF DISPLAY DEVICE AND MANUFACTURING METHOD OF DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/427817 [patent_app_country] => US [patent_app_date] => 2024-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10773 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18427817 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/427817
MANUFACTURING DEVICE OF DISPLAY DEVICE AND MANUFACTURING METHOD OF DISPLAY DEVICE Jan 30, 2024 Pending
Array ( [id] => 19436268 [patent_doc_number] => 20240304766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => LIGHT-EMITTING DEVICE PACKAGE AND LIGHTING DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/417508 [patent_app_country] => US [patent_app_date] => 2024-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6846 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18417508 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/417508
LIGHT-EMITTING DEVICE PACKAGE AND LIGHTING DEVICE INCLUDING THE SAME Jan 18, 2024 Pending
Array ( [id] => 19627233 [patent_doc_number] => 12166084 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-10 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 18/412605 [patent_app_country] => US [patent_app_date] => 2024-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 23 [patent_no_of_words] => 9277 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18412605 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/412605
Semiconductor device and manufacturing method thereof Jan 14, 2024 Issued
Array ( [id] => 19835757 [patent_doc_number] => 20250087543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => INTEGRATED CIRCUIT PACKAGES AND METHODS [patent_app_type] => utility [patent_app_number] => 18/401862 [patent_app_country] => US [patent_app_date] => 2024-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8179 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18401862 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/401862
INTEGRATED CIRCUIT PACKAGES AND METHODS Jan 1, 2024 Pending
Array ( [id] => 19116609 [patent_doc_number] => 20240128359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 18/395662 [patent_app_country] => US [patent_app_date] => 2023-12-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26842 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18395662 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/395662
Semiconductor device and manufacturing method Dec 24, 2023 Issued
Array ( [id] => 20072275 [patent_doc_number] => 20250210497 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-26 [patent_title] => SYSTEMS AND METHODS FOR POWER CONTROL IN 3D STACKED DIE [patent_app_type] => utility [patent_app_number] => 18/395111 [patent_app_country] => US [patent_app_date] => 2023-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1157 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18395111 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/395111
SYSTEMS AND METHODS FOR POWER CONTROL IN 3D STACKED DIE Dec 21, 2023 Pending
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