Search

Lynne Ann Gurley

Supervisory Patent Examiner (ID: 16126, Phone: (571)272-1670 , Office: P/2811 )

Most Active Art Unit
2812
Art Unit(s)
2812, 2899, 2811, 1104, 1763, 2814
Total Applications
970
Issued Applications
787
Pending Applications
29
Abandoned Applications
154

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14955203 [patent_doc_number] => 10438880 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-08 [patent_title] => Interposer with a nanostructure energy storage device [patent_app_type] => utility [patent_app_number] => 16/078331 [patent_app_country] => US [patent_app_date] => 2017-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 6705 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16078331 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/078331
Interposer with a nanostructure energy storage device Feb 23, 2017 Issued
Array ( [id] => 11925614 [patent_doc_number] => 09793202 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-10-17 [patent_title] => 'Wireless apparatus' [patent_app_type] => utility [patent_app_number] => 15/438895 [patent_app_country] => US [patent_app_date] => 2017-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 5686 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15438895 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/438895
Wireless apparatus Feb 21, 2017 Issued
Array ( [id] => 13242905 [patent_doc_number] => 10134661 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-20 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/438457 [patent_app_country] => US [patent_app_date] => 2017-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 1866 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15438457 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/438457
Semiconductor device Feb 20, 2017 Issued
Array ( [id] => 13293371 [patent_doc_number] => 10157886 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-18 [patent_title] => Fan-out semiconductor package [patent_app_type] => utility [patent_app_number] => 15/437766 [patent_app_country] => US [patent_app_date] => 2017-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 11129 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15437766 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/437766
Fan-out semiconductor package Feb 20, 2017 Issued
Array ( [id] => 13293371 [patent_doc_number] => 10157886 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-18 [patent_title] => Fan-out semiconductor package [patent_app_type] => utility [patent_app_number] => 15/437766 [patent_app_country] => US [patent_app_date] => 2017-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 11129 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15437766 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/437766
Fan-out semiconductor package Feb 20, 2017 Issued
Array ( [id] => 11925625 [patent_doc_number] => 09793214 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-10-17 [patent_title] => 'Heterostructure interconnects for high frequency applications' [patent_app_type] => utility [patent_app_number] => 15/438174 [patent_app_country] => US [patent_app_date] => 2017-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 27 [patent_no_of_words] => 6873 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15438174 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/438174
Heterostructure interconnects for high frequency applications Feb 20, 2017 Issued
Array ( [id] => 12436506 [patent_doc_number] => 09978686 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-05-22 [patent_title] => Interconnection of semiconductor devices in extreme environment microelectronic integrated circuit chips [patent_app_type] => utility [patent_app_number] => 15/438130 [patent_app_country] => US [patent_app_date] => 2017-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5505 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15438130 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/438130
Interconnection of semiconductor devices in extreme environment microelectronic integrated circuit chips Feb 20, 2017 Issued
Array ( [id] => 13271237 [patent_doc_number] => 10147705 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-04 [patent_title] => Stacked semiconductor die assemblies with die substrate extensions [patent_app_type] => utility [patent_app_number] => 15/438691 [patent_app_country] => US [patent_app_date] => 2017-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3982 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15438691 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/438691
Stacked semiconductor die assemblies with die substrate extensions Feb 20, 2017 Issued
Array ( [id] => 12168376 [patent_doc_number] => 09887148 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-02-06 [patent_title] => 'Fan-out semiconductor package structure and fabricating method' [patent_app_type] => utility [patent_app_number] => 15/437444 [patent_app_country] => US [patent_app_date] => 2017-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 2225 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15437444 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/437444
Fan-out semiconductor package structure and fabricating method Feb 20, 2017 Issued
Array ( [id] => 13293371 [patent_doc_number] => 10157886 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-18 [patent_title] => Fan-out semiconductor package [patent_app_type] => utility [patent_app_number] => 15/437766 [patent_app_country] => US [patent_app_date] => 2017-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 11129 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15437766 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/437766
Fan-out semiconductor package Feb 20, 2017 Issued
Array ( [id] => 13293371 [patent_doc_number] => 10157886 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-18 [patent_title] => Fan-out semiconductor package [patent_app_type] => utility [patent_app_number] => 15/437766 [patent_app_country] => US [patent_app_date] => 2017-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 11129 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15437766 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/437766
Fan-out semiconductor package Feb 20, 2017 Issued
Array ( [id] => 13006033 [patent_doc_number] => 10026687 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-07-17 [patent_title] => Metal interconnects for super (skip) via integration [patent_app_type] => utility [patent_app_number] => 15/437100 [patent_app_country] => US [patent_app_date] => 2017-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2920 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15437100 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/437100
Metal interconnects for super (skip) via integration Feb 19, 2017 Issued
Array ( [id] => 12019753 [patent_doc_number] => 09812464 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-11-07 [patent_title] => 'Three-dimensional semiconductor device' [patent_app_type] => utility [patent_app_number] => 15/437426 [patent_app_country] => US [patent_app_date] => 2017-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 47 [patent_no_of_words] => 19342 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15437426 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/437426
Three-dimensional semiconductor device Feb 19, 2017 Issued
Array ( [id] => 12012651 [patent_doc_number] => 09805972 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-10-31 [patent_title] => 'Skip via structures' [patent_app_type] => utility [patent_app_number] => 15/437065 [patent_app_country] => US [patent_app_date] => 2017-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3521 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15437065 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/437065
Skip via structures Feb 19, 2017 Issued
Array ( [id] => 11831773 [patent_doc_number] => 09728522 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-08 [patent_title] => 'Integrated circuit packages and methods of forming same' [patent_app_type] => utility [patent_app_number] => 15/425859 [patent_app_country] => US [patent_app_date] => 2017-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 10370 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15425859 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/425859
Integrated circuit packages and methods of forming same Feb 5, 2017 Issued
Array ( [id] => 12102167 [patent_doc_number] => 09859267 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-02 [patent_title] => 'Package structures and methods of forming the same' [patent_app_type] => utility [patent_app_number] => 15/425403 [patent_app_country] => US [patent_app_date] => 2017-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 29 [patent_no_of_words] => 9136 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15425403 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/425403
Package structures and methods of forming the same Feb 5, 2017 Issued
Array ( [id] => 13145753 [patent_doc_number] => 10090215 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-02 [patent_title] => System and method for dual-region singulation [patent_app_type] => utility [patent_app_number] => 15/403673 [patent_app_country] => US [patent_app_date] => 2017-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5177 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15403673 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/403673
System and method for dual-region singulation Jan 10, 2017 Issued
Array ( [id] => 12026776 [patent_doc_number] => 20170316875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'FLUXGATE DEVICE WITH LOW FLUXGATE NOISE' [patent_app_type] => utility [patent_app_number] => 15/399937 [patent_app_country] => US [patent_app_date] => 2017-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 11069 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15399937 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/399937
Fluxgate device with low fluxgate noise Jan 5, 2017 Issued
Array ( [id] => 13977007 [patent_doc_number] => 10217873 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-26 [patent_title] => Semiconductor device and method of forming semiconductor die with active region responsive to external stimulus [patent_app_type] => utility [patent_app_number] => 15/394337 [patent_app_country] => US [patent_app_date] => 2016-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 40 [patent_no_of_words] => 7524 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15394337 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/394337
Semiconductor device and method of forming semiconductor die with active region responsive to external stimulus Dec 28, 2016 Issued
Array ( [id] => 16553010 [patent_doc_number] => 10886175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-05 [patent_title] => Differentiated molecular domains for selective hardmask fabrication and structures resulting therefrom [patent_app_type] => utility [patent_app_number] => 16/347507 [patent_app_country] => US [patent_app_date] => 2016-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 13414 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16347507 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/347507
Differentiated molecular domains for selective hardmask fabrication and structures resulting therefrom Dec 22, 2016 Issued
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