Search

Mackly Monestime

Examiner (ID: 17837)

Most Active Art Unit
2676
Art Unit(s)
2676, 2783, 2674, 2671, 2183
Total Applications
304
Issued Applications
271
Pending Applications
18
Abandoned Applications
15

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16700096 [patent_doc_number] => 10950707 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-16 [patent_title] => Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions [patent_app_type] => utility [patent_app_number] => 15/929593 [patent_app_country] => US [patent_app_date] => 2020-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 10109 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15929593 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/929593
Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions May 11, 2020 Issued
Array ( [id] => 17115915 [patent_doc_number] => 20210296512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => JUNCTION BARRIER SCHOTTKY DIODE [patent_app_type] => utility [patent_app_number] => 17/263365 [patent_app_country] => US [patent_app_date] => 2020-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7268 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17263365 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/263365
Junction barrier schottky diode May 8, 2020 Issued
Array ( [id] => 17289131 [patent_doc_number] => 11205692 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-21 [patent_title] => Display device and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/860160 [patent_app_country] => US [patent_app_date] => 2020-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 62 [patent_figures_cnt] => 101 [patent_no_of_words] => 27728 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16860160 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/860160
Display device and method for manufacturing the same Apr 27, 2020 Issued
Array ( [id] => 16241790 [patent_doc_number] => 20200259024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-13 [patent_title] => MANUFACTURING METHOD OF SENSING MODULE FOR OPTICAL FINGERPRINT SENSOR [patent_app_type] => utility [patent_app_number] => 16/861140 [patent_app_country] => US [patent_app_date] => 2020-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4881 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16861140 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/861140
Manufacturing method of sensing module for optical fingerprint sensor Apr 27, 2020 Issued
Array ( [id] => 16210672 [patent_doc_number] => 20200243662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => METHOD FOR DEPINNING THE FERMI LEVEL OF A SEMICONDUCTOR AT AN ELECTRICAL JUNCTION AND DEVICES INCORPORATING SUCH JUNCTIONS [patent_app_type] => utility [patent_app_number] => 16/847878 [patent_app_country] => US [patent_app_date] => 2020-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10094 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16847878 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/847878
Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions Apr 13, 2020 Issued
Array ( [id] => 16707680 [patent_doc_number] => 10957624 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-23 [patent_title] => Micro heat transfer arrays, micro cold plates, and thermal management systems for cooling semiconductor devices, and methods for using and making such arrays, plates, and systems [patent_app_type] => utility [patent_app_number] => 16/840305 [patent_app_country] => US [patent_app_date] => 2020-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 67 [patent_no_of_words] => 30464 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16840305 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/840305
Micro heat transfer arrays, micro cold plates, and thermal management systems for cooling semiconductor devices, and methods for using and making such arrays, plates, and systems Apr 2, 2020 Issued
Array ( [id] => 16601578 [patent_doc_number] => 20210028109 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-28 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/835557 [patent_app_country] => US [patent_app_date] => 2020-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11069 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16835557 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/835557
Semiconductor devices Mar 30, 2020 Issued
Array ( [id] => 16210351 [patent_doc_number] => 20200243341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => IN-SITU TUNGSTEN DEPOSITION WITHOUT BARRIER LAYER [patent_app_type] => utility [patent_app_number] => 16/835279 [patent_app_country] => US [patent_app_date] => 2020-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12608 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16835279 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/835279
In-situ tungsten deposition without barrier layer Mar 29, 2020 Issued
Array ( [id] => 17381301 [patent_doc_number] => 11239334 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/811605 [patent_app_country] => US [patent_app_date] => 2020-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 27 [patent_no_of_words] => 8708 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16811605 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/811605
Semiconductor device Mar 5, 2020 Issued
Array ( [id] => 16080891 [patent_doc_number] => 20200194432 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => Multi-Layer Horizontal Thyristor Random Access Memory and Peripheral Circuitry [patent_app_type] => utility [patent_app_number] => 16/801105 [patent_app_country] => US [patent_app_date] => 2020-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5892 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16801105 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/801105
Multi-layer horizontal thyristor random access memory and peripheral circuitry Feb 24, 2020 Issued
Array ( [id] => 18256911 [patent_doc_number] => 20230083951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => CHIP TRAY FOR SELF-ASSEMBLY, AND METHOD FOR SUPPLYING SEMICONDUCTOR LIGHT EMITTING ELEMENTS [patent_app_type] => utility [patent_app_number] => 17/799080 [patent_app_country] => US [patent_app_date] => 2020-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18242 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17799080 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/799080
Chip tray for self-assembly, and method for supplying semiconductor light emitting elements Feb 18, 2020 Issued
Array ( [id] => 17463670 [patent_doc_number] => 20220076976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => Automated Batch Production Thin Film Deposition Systems and Methods of Using the Same [patent_app_type] => utility [patent_app_number] => 17/310680 [patent_app_country] => US [patent_app_date] => 2020-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10398 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17310680 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/310680
Automated batch production thin film deposition systems and methods of using the same Feb 18, 2020 Issued
Array ( [id] => 16995614 [patent_doc_number] => 20210234034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-29 [patent_title] => ACTIVE AND DUMMY FIN STRUCTURES [patent_app_type] => utility [patent_app_number] => 16/751779 [patent_app_country] => US [patent_app_date] => 2020-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2923 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16751779 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/751779
Active and dummy fin structures Jan 23, 2020 Issued
Array ( [id] => 15939645 [patent_doc_number] => 20200161456 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => Quantum Structures Using Aperture Channel Tunneling Through Depletion Region [patent_app_type] => utility [patent_app_number] => 16/747237 [patent_app_country] => US [patent_app_date] => 2020-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 33332 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16747237 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/747237
Quantum structures using aperture channel tunneling through depletion region Jan 19, 2020 Issued
Array ( [id] => 15899339 [patent_doc_number] => 20200149188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => SIC EPITAXIAL WAFER, MANUFACTURING APPARATUS OF SIC EPITAXIAL WAFER, FABRICATION METHOD OF SIC EPITAXIAL WAFER, AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/740025 [patent_app_country] => US [patent_app_date] => 2020-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21108 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16740025 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/740025
SiC epitaxial wafer, manufacturing apparatus of SiC epitaxial wafer, fabrication method of SiC epitaxial wafer, and semiconductor device Jan 9, 2020 Issued
Array ( [id] => 16241611 [patent_doc_number] => 20200258845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-13 [patent_title] => METHODS RELATED TO SHIELDED MODULE HAVING COMPRESSION OVERMOLD [patent_app_type] => utility [patent_app_number] => 16/734356 [patent_app_country] => US [patent_app_date] => 2020-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4767 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16734356 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/734356
Methods related to shielded module having compression overmold Jan 4, 2020 Issued
Array ( [id] => 17085759 [patent_doc_number] => 20210280766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => SUPERCONDUCTOR DEVICES HAVING BURIED QUASIPARTICLE TRAPS [patent_app_type] => utility [patent_app_number] => 16/728504 [patent_app_country] => US [patent_app_date] => 2019-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10262 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16728504 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/728504
Superconductor devices having buried quasiparticle traps Dec 26, 2019 Issued
Array ( [id] => 15807985 [patent_doc_number] => 20200127135 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => Vertical Trench Power Devices with Oxygen Inserted Si-Layers [patent_app_type] => utility [patent_app_number] => 16/719070 [patent_app_country] => US [patent_app_date] => 2019-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6199 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16719070 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/719070
Vertical trench power devices with oxygen inserted Si-layers Dec 17, 2019 Issued
Array ( [id] => 15807983 [patent_doc_number] => 20200127134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => Vertical Power Devices with Oxygen Inserted Si-Layers [patent_app_type] => utility [patent_app_number] => 16/718748 [patent_app_country] => US [patent_app_date] => 2019-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5789 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16718748 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/718748
Vertical power devices with oxygen inserted Si-layers Dec 17, 2019 Issued
Array ( [id] => 16536660 [patent_doc_number] => 10879274 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/711583 [patent_app_country] => US [patent_app_date] => 2019-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 32 [patent_no_of_words] => 17681 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16711583 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/711583
Semiconductor device Dec 11, 2019 Issued
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