Search

Maged M. Almawri

Examiner (ID: 6049, Phone: (313)446-6565 , Office: P/2834 )

Most Active Art Unit
2834
Art Unit(s)
2834
Total Applications
662
Issued Applications
437
Pending Applications
94
Abandoned Applications
157

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13799705 [patent_doc_number] => 20190013391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-10 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/995049 [patent_app_country] => US [patent_app_date] => 2018-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7590 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15995049 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/995049
Semiconductor device May 30, 2018 Issued
Array ( [id] => 14691673 [patent_doc_number] => 20190244952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-08 [patent_title] => SEMICONDUCTOR APPARATUS [patent_app_type] => utility [patent_app_number] => 15/995113 [patent_app_country] => US [patent_app_date] => 2018-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4733 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15995113 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/995113
Semiconductor apparatus May 30, 2018 Issued
Array ( [id] => 15218295 [patent_doc_number] => 20190371834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => METHHODS OF MANUFACTURING PRINTABLE PHOTODETECTOR ARRAY PANELS [patent_app_type] => utility [patent_app_number] => 15/994988 [patent_app_country] => US [patent_app_date] => 2018-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8403 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15994988 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/994988
Methods of manufacturing printable photodetector array panels May 30, 2018 Issued
Array ( [id] => 16653597 [patent_doc_number] => 10930790 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-23 [patent_title] => Thin film transistor, gate driver including the same, and display device including the gate driver [patent_app_type] => utility [patent_app_number] => 15/994765 [patent_app_country] => US [patent_app_date] => 2018-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 29 [patent_no_of_words] => 13289 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15994765 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/994765
Thin film transistor, gate driver including the same, and display device including the gate driver May 30, 2018 Issued
Array ( [id] => 17803213 [patent_doc_number] => 11417524 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-16 [patent_title] => Manufacturing method of a group III-V compound semiconductor device [patent_app_type] => utility [patent_app_number] => 16/978969 [patent_app_country] => US [patent_app_date] => 2018-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9466 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16978969 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/978969
Manufacturing method of a group III-V compound semiconductor device May 23, 2018 Issued
Array ( [id] => 14707005 [patent_doc_number] => 10381261 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-13 [patent_title] => Method of manufacturing high resistivity semiconductor-on-insulator wafers with charge trapping layers [patent_app_type] => utility [patent_app_number] => 15/984586 [patent_app_country] => US [patent_app_date] => 2018-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 10143 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 404 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15984586 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/984586
Method of manufacturing high resistivity semiconductor-on-insulator wafers with charge trapping layers May 20, 2018 Issued
Array ( [id] => 14985305 [patent_doc_number] => 10446574 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-15 [patent_title] => Memory cells and integrated structures [patent_app_type] => utility [patent_app_number] => 15/975902 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5115 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15975902 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/975902
Memory cells and integrated structures May 9, 2018 Issued
Array ( [id] => 13435037 [patent_doc_number] => 20180269061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-20 [patent_title] => CAPPED ALD FILMS FOR DOPING FIN-SHAPED CHANNEL REGIONS OF 3-D IC TRANSISTORS [patent_app_type] => utility [patent_app_number] => 15/976793 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13616 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -28 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976793 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/976793
Capped ALD films for doping fin-shaped channel regions of 3-D IC transistors May 9, 2018 Issued
Array ( [id] => 15733765 [patent_doc_number] => 10615321 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-07 [patent_title] => Light emitting device package [patent_app_type] => utility [patent_app_number] => 15/974612 [patent_app_country] => US [patent_app_date] => 2018-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 9464 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15974612 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/974612
Light emitting device package May 7, 2018 Issued
Array ( [id] => 13528213 [patent_doc_number] => 20180315649 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-01 [patent_title] => METHOD OF FORMING TUNGSTEN FILM [patent_app_type] => utility [patent_app_number] => 15/960726 [patent_app_country] => US [patent_app_date] => 2018-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7034 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15960726 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/960726
Method of forming tungsten film Apr 23, 2018 Issued
Array ( [id] => 16386525 [patent_doc_number] => 10811370 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-20 [patent_title] => Packaged electronic circuits having moisture protection encapsulation and methods of forming same [patent_app_type] => utility [patent_app_number] => 15/960693 [patent_app_country] => US [patent_app_date] => 2018-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 10131 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15960693 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/960693
Packaged electronic circuits having moisture protection encapsulation and methods of forming same Apr 23, 2018 Issued
Array ( [id] => 14049601 [patent_doc_number] => 20190080908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => METHOD OF MANUFACTURING METAL HARDMASK AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/960583 [patent_app_country] => US [patent_app_date] => 2018-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7677 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15960583 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/960583
Method of manufacturing metal hardmask and semiconductor device Apr 23, 2018 Issued
Array ( [id] => 13528363 [patent_doc_number] => 20180315724 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-01 [patent_title] => METHOD FOR MAKING NANOSCALE DEVICES [patent_app_type] => utility [patent_app_number] => 15/959363 [patent_app_country] => US [patent_app_date] => 2018-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4219 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15959363 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/959363
Method for making nanoscale devices with fractal nanostructures Apr 22, 2018 Issued
Array ( [id] => 13514341 [patent_doc_number] => 20180308713 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-25 [patent_title] => Systems And Methods For Improved Delamination Characteristics In A Semiconductor Package [patent_app_type] => utility [patent_app_number] => 15/959658 [patent_app_country] => US [patent_app_date] => 2018-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3408 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15959658 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/959658
Systems and methods for improved delamination characteristics in a semiconductor package Apr 22, 2018 Issued
Array ( [id] => 15611543 [patent_doc_number] => 10586843 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-10 [patent_title] => Tunable on-chip nanosheet resistor [patent_app_type] => utility [patent_app_number] => 15/958488 [patent_app_country] => US [patent_app_date] => 2018-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 27 [patent_no_of_words] => 3267 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15958488 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/958488
Tunable on-chip nanosheet resistor Apr 19, 2018 Issued
Array ( [id] => 13350001 [patent_doc_number] => 20180226540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-09 [patent_title] => RESONANT CAVITY STRAINED III-V PHOTODETECTOR AND LED ON SILICON SUBSTRATE [patent_app_type] => utility [patent_app_number] => 15/948577 [patent_app_country] => US [patent_app_date] => 2018-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4804 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15948577 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/948577
Resonant cavity strained III-V photodetector and LED on silicon substrate Apr 8, 2018 Issued
Array ( [id] => 15488699 [patent_doc_number] => 10559714 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-11 [patent_title] => Resonant cavity strained III-V photodetector and LED on silicon substrate [patent_app_type] => utility [patent_app_number] => 15/948425 [patent_app_country] => US [patent_app_date] => 2018-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4804 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15948425 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/948425
Resonant cavity strained III-V photodetector and LED on silicon substrate Apr 8, 2018 Issued
Array ( [id] => 16301206 [patent_doc_number] => 20200286929 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-10 [patent_title] => TRANSISTOR, ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME, DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/318740 [patent_app_country] => US [patent_app_date] => 2018-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4849 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16318740 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/318740
Transistor, array substrate and method of manufacturing the same, display device Apr 1, 2018 Issued
Array ( [id] => 14938561 [patent_doc_number] => 20190304919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => HYBRID METAL INTERCONNECT STRUCTURES FOR ADVANCED PROCESS NODES [patent_app_type] => utility [patent_app_number] => 15/936964 [patent_app_country] => US [patent_app_date] => 2018-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3030 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15936964 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/936964
HYBRID METAL INTERCONNECT STRUCTURES FOR ADVANCED PROCESS NODES Mar 26, 2018 Abandoned
Array ( [id] => 13528359 [patent_doc_number] => 20180315722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-01 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/937028 [patent_app_country] => US [patent_app_date] => 2018-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6868 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15937028 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/937028
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Mar 26, 2018 Abandoned
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