Search

Maged M. Almawri

Examiner (ID: 6049, Phone: (313)446-6565 , Office: P/2834 )

Most Active Art Unit
2834
Art Unit(s)
2834
Total Applications
662
Issued Applications
437
Pending Applications
94
Abandoned Applications
157

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14762673 [patent_doc_number] => 10392725 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-27 [patent_title] => Method for depositing silicon feedstock material, silicon wafer, solar cell and PV module [patent_app_type] => utility [patent_app_number] => 15/708227 [patent_app_country] => US [patent_app_date] => 2017-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 7127 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15708227 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/708227
Method for depositing silicon feedstock material, silicon wafer, solar cell and PV module Sep 18, 2017 Issued
Array ( [id] => 13936095 [patent_doc_number] => 20190051563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-14 [patent_title] => METHODS, APPARATUS, AND MANUFACTURING SYSTEM FOR SELF-ALIGNED PATTERNING OF A VERTICAL TRANSISTOR [patent_app_type] => utility [patent_app_number] => 15/676005 [patent_app_country] => US [patent_app_date] => 2017-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7507 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15676005 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/676005
Methods, apparatus, and manufacturing system for self-aligned patterning of a vertical transistor Aug 13, 2017 Issued
Array ( [id] => 17284133 [patent_doc_number] => 11201176 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => Array substrate, display apparatus, and method of fabricating array substrate [patent_app_type] => utility [patent_app_number] => 16/070098 [patent_app_country] => US [patent_app_date] => 2017-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 5624 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16070098 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/070098
Array substrate, display apparatus, and method of fabricating array substrate Aug 7, 2017 Issued
Array ( [id] => 16218724 [patent_doc_number] => 10734547 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-04 [patent_title] => Semiconductor device and semiconductor device package comprising same [patent_app_type] => utility [patent_app_number] => 16/312937 [patent_app_country] => US [patent_app_date] => 2017-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 26 [patent_no_of_words] => 16712 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16312937 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/312937
Semiconductor device and semiconductor device package comprising same Jun 22, 2017 Issued
Array ( [id] => 16645660 [patent_doc_number] => 10923528 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Optoelectronic device comprising pixels with improved contrast and brightness [patent_app_type] => utility [patent_app_number] => 16/313005 [patent_app_country] => US [patent_app_date] => 2017-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 41 [patent_no_of_words] => 11857 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16313005 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/313005
Optoelectronic device comprising pixels with improved contrast and brightness Jun 21, 2017 Issued
Array ( [id] => 15024283 [patent_doc_number] => 20190323146 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => GROUP III NITRIDE LAMINATE AND VERTICAL SEMICONDUCTOR DEVICE HAVING THE LAMINATE [patent_app_type] => utility [patent_app_number] => 16/312885 [patent_app_country] => US [patent_app_date] => 2017-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6165 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16312885 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/312885
Group III nitride laminate and vertical semiconductor device having the laminate Jun 18, 2017 Issued
Array ( [id] => 11959315 [patent_doc_number] => 20170263467 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-14 [patent_title] => 'METHODS OF FORMING A PORTION OF A MEMORY ARRAY HAVING A CONDUCTOR HAVING A VARIABLE CONCENTRATION OF GERMANIUM' [patent_app_type] => utility [patent_app_number] => 15/606080 [patent_app_country] => US [patent_app_date] => 2017-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10488 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15606080 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/606080
Methods of forming a portion of a memory array having a conductor having a variable concentration of germanium May 25, 2017 Issued
Array ( [id] => 13271323 [patent_doc_number] => 10147748 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-04 [patent_title] => Image sensor chip [patent_app_type] => utility [patent_app_number] => 15/600962 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3955 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15600962 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/600962
Image sensor chip May 21, 2017 Issued
Array ( [id] => 15468253 [patent_doc_number] => 10549988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Wafer-level package with enhanced performance [patent_app_type] => utility [patent_app_number] => 15/601858 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 5941 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15601858 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/601858
Wafer-level package with enhanced performance May 21, 2017 Issued
Array ( [id] => 15468253 [patent_doc_number] => 10549988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Wafer-level package with enhanced performance [patent_app_type] => utility [patent_app_number] => 15/601858 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 5941 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15601858 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/601858
Wafer-level package with enhanced performance May 21, 2017 Issued
Array ( [id] => 13528621 [patent_doc_number] => 20180315853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-01 [patent_title] => SEMICONDUCTOR DEVICE WITH CONTRACTED ISOLATION FEATURE AND FORMATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/600919 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8044 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15600919 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/600919
Semiconductor device with contracted isolation feature and formation method thereof May 21, 2017 Issued
Array ( [id] => 15468253 [patent_doc_number] => 10549988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Wafer-level package with enhanced performance [patent_app_type] => utility [patent_app_number] => 15/601858 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 5941 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15601858 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/601858
Wafer-level package with enhanced performance May 21, 2017 Issued
Array ( [id] => 15468253 [patent_doc_number] => 10549988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Wafer-level package with enhanced performance [patent_app_type] => utility [patent_app_number] => 15/601858 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 5941 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15601858 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/601858
Wafer-level package with enhanced performance May 21, 2017 Issued
Array ( [id] => 15468253 [patent_doc_number] => 10549988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Wafer-level package with enhanced performance [patent_app_type] => utility [patent_app_number] => 15/601858 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 5941 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15601858 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/601858
Wafer-level package with enhanced performance May 21, 2017 Issued
Array ( [id] => 15468253 [patent_doc_number] => 10549988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Wafer-level package with enhanced performance [patent_app_type] => utility [patent_app_number] => 15/601858 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 5941 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15601858 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/601858
Wafer-level package with enhanced performance May 21, 2017 Issued
Array ( [id] => 13085267 [patent_doc_number] => 10062707 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-28 [patent_title] => Semiconductor device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 15/601474 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 9573 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15601474 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/601474
Semiconductor device and method of manufacturing the same May 21, 2017 Issued
Array ( [id] => 15468253 [patent_doc_number] => 10549988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Wafer-level package with enhanced performance [patent_app_type] => utility [patent_app_number] => 15/601858 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 5941 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15601858 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/601858
Wafer-level package with enhanced performance May 21, 2017 Issued
Array ( [id] => 15468253 [patent_doc_number] => 10549988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Wafer-level package with enhanced performance [patent_app_type] => utility [patent_app_number] => 15/601858 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 5941 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15601858 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/601858
Wafer-level package with enhanced performance May 21, 2017 Issued
Array ( [id] => 15468253 [patent_doc_number] => 10549988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Wafer-level package with enhanced performance [patent_app_type] => utility [patent_app_number] => 15/601858 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 5941 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15601858 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/601858
Wafer-level package with enhanced performance May 21, 2017 Issued
Array ( [id] => 15468253 [patent_doc_number] => 10549988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Wafer-level package with enhanced performance [patent_app_type] => utility [patent_app_number] => 15/601858 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 5941 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15601858 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/601858
Wafer-level package with enhanced performance May 21, 2017 Issued
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