Magid Y. Dimyan

Array ( [id] => 5516917 [patent_doc_number] => 20090217224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-27 [patent_title] => 'METHOD AND SYSTEM FOR MASK DESIGN FOR DOUBLE PATTERNING' [patent_app_type] => utility [patent_app_number] => 12/390377 [patent_app_country] => US [patent_app_date] => 2009-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 13220 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20090217224.pdf [firstpage_image] =>[orig_patent_app_number] => 12390377 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7530116 [patent_doc_number] => 08046722 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-25 [patent_title] => 'Method for correcting a mask pattern, system for correcting a mask pattern, program, method for manufacturing a photomask and method for manufacturing a semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/379047 [patent_app_country] => US [patent_app_date] => 2009-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 23 [patent_no_of_words] => 7013 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/046/08046722.pdf [firstpage_image] =>[orig_patent_app_number] => 12379047 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8001375 [patent_doc_number] => 08082535 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-12-20 [patent_title] => 'Method and apparatus for testing programmable integrated circuits' [patent_app_type] => utility [patent_app_number] => 12/364667 [patent_app_country] => US [patent_app_date] => 2009-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3631 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/082/08082535.pdf [firstpage_image] =>[orig_patent_app_number] => 12364667 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8149416 [patent_doc_number] => 08166438 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-24 [patent_title] => 'Low RC local clock distribution' [patent_app_type] => utility [patent_app_number] => 12/361027 [patent_app_country] => US [patent_app_date] => 2009-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2853 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/166/08166438.pdf [firstpage_image] =>[orig_patent_app_number] => 12361027 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8235656 [patent_doc_number] => 08201117 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-12 [patent_title] => 'Method for scalable derivation of an implication-based reachable state set overapproximation' [patent_app_type] => utility [patent_app_number] => 12/357907 [patent_app_country] => US [patent_app_date] => 2009-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5280 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/201/08201117.pdf [firstpage_image] =>[orig_patent_app_number] => 12357907 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5411952 [patent_doc_number] => 20090125851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-14 [patent_title] => 'Nonlinear Driver Model For Multi-Driver Systems' [patent_app_type] => utility [patent_app_number] => 12/353136 [patent_app_country] => US [patent_app_date] => 2009-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7000 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20090125851.pdf [firstpage_image] =>[orig_patent_app_number] => 12353136 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7542993 [patent_doc_number] => 08060842 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-15 [patent_title] => 'Method, program product and apparatus for model based geometry decomposition for use in a multiple exposure process' [patent_app_type] => utility [patent_app_number] => 12/340608 [patent_app_country] => US [patent_app_date] => 2008-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8324 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/060/08060842.pdf [firstpage_image] =>[orig_patent_app_number] => 12340608 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 38605 [patent_doc_number] => 07788628 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-08-31 [patent_title] => 'Computational efficiency in photolithographic process simulation' [patent_app_type] => utility [patent_app_number] => 12/340319 [patent_app_country] => US [patent_app_date] => 2008-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 13357 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/788/07788628.pdf [firstpage_image] =>[orig_patent_app_number] => 12340319 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5286644 [patent_doc_number] => 20090100319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-16 [patent_title] => 'Decoder using a memory for storing state metrics implementing a decoder trellis' [patent_app_type] => utility [patent_app_number] => 12/336104 [patent_app_country] => US [patent_app_date] => 2008-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9075 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20090100319.pdf [firstpage_image] =>[orig_patent_app_number] => 12336104 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7537751 [patent_doc_number] => 08051394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-01 [patent_title] => 'Yield evaluating apparatus and method thereof' [patent_app_type] => utility [patent_app_number] => 12/264227 [patent_app_country] => US [patent_app_date] => 2008-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 31 [patent_no_of_words] => 8082 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/051/08051394.pdf [firstpage_image] =>[orig_patent_app_number] => 12264227 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5535436 [patent_doc_number] => 20090235224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-17 [patent_title] => 'Method for Processing Optical Proximity Correction' [patent_app_type] => utility [patent_app_number] => 12/261257 [patent_app_country] => US [patent_app_date] => 2008-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1841 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20090235224.pdf [firstpage_image] =>[orig_patent_app_number] => 12261257 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5376027 [patent_doc_number] => 20090313588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-17 [patent_title] => 'Method to Extract and Apply Circuit Features in Organic Substrate for Automation of Warp Modeling' [patent_app_type] => utility [patent_app_number] => 12/260957 [patent_app_country] => US [patent_app_date] => 2008-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 6481 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0313/20090313588.pdf [firstpage_image] =>[orig_patent_app_number] => 12260957 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7780248 [patent_doc_number] => 08122401 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-02-21 [patent_title] => 'System, method, and computer program product for determining equivalence of netlists utilizing at least one transformation' [patent_app_type] => utility [patent_app_number] => 12/260837 [patent_app_country] => US [patent_app_date] => 2008-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7968 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/122/08122401.pdf [firstpage_image] =>[orig_patent_app_number] => 12260837 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5445304 [patent_doc_number] => 20090046530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-19 [patent_title] => 'RESETTABLE MEMORY APPARATUSES AND DESIGN' [patent_app_type] => utility [patent_app_number] => 12/259223 [patent_app_country] => US [patent_app_date] => 2008-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 11476 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20090046530.pdf [firstpage_image] =>[orig_patent_app_number] => 12259223 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8109597 [patent_doc_number] => 08156453 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-04-10 [patent_title] => 'Method and system identifying and locating IP blocks and block suppliers for an electronic design' [patent_app_type] => utility [patent_app_number] => 12/252577 [patent_app_country] => US [patent_app_date] => 2008-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5558 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/156/08156453.pdf [firstpage_image] =>[orig_patent_app_number] => 12252577 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8703947 [patent_doc_number] => 08397184 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'Channel length scaling for footprint compatible digital library cell design' [patent_app_type] => utility [patent_app_number] => 12/248677 [patent_app_country] => US [patent_app_date] => 2008-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 3156 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12248677 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4616662 [patent_doc_number] => 07992115 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-02 [patent_title] => 'Overlay measurement on double patterning substrate' [patent_app_type] => utility [patent_app_number] => 12/248777 [patent_app_country] => US [patent_app_date] => 2008-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5302 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/992/07992115.pdf [firstpage_image] =>[orig_patent_app_number] => 12248777 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6389536 [patent_doc_number] => 20100083203 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'Modeling System-Level Effects of Soft Errors' [patent_app_type] => utility [patent_app_number] => 12/243427 [patent_app_country] => US [patent_app_date] => 2008-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9967 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20100083203.pdf [firstpage_image] =>[orig_patent_app_number] => 12243427 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7510729 [patent_doc_number] => 08037441 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-11 [patent_title] => 'Gridded-router based wiring on a non-gridded library' [patent_app_type] => utility [patent_app_number] => 12/237497 [patent_app_country] => US [patent_app_date] => 2008-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6941 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/037/08037441.pdf [firstpage_image] =>[orig_patent_app_number] => 12237497 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6385515 [patent_doc_number] => 20100077372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-25 [patent_title] => 'Apparatus, Method and Computer Program Product for Fast Stimulation of Manufacturing Effects During Integrated Circuit Design' [patent_app_type] => utility [patent_app_number] => 12/237727 [patent_app_country] => US [patent_app_date] => 2008-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5280 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20100077372.pdf [firstpage_image] =>[orig_patent_app_number] => 12237727 [rel_patent_id] =>[rel_patent_doc_number] =>)