Magid Y. Dimyan

Array ( [id] => 6167152 [patent_doc_number] => 20110161906 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'SIGNAL CONVERSION FACILITY AND METHOD FOR CREATING PROGRAMMING FOR A SIGNAL CONVERSION FACILITY' [patent_app_type] => utility [patent_app_number] => 12/310147 [patent_app_country] => US [patent_app_date] => 2007-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6639 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20110161906.pdf [firstpage_image] =>[orig_patent_app_number] => 12310147 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4659493 [patent_doc_number] => 20080028355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-31 [patent_title] => 'METHOD AND SOFTWARE TOOL FOR DESIGNING AN INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/835687 [patent_app_country] => US [patent_app_date] => 2007-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5011 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20080028355.pdf [firstpage_image] =>[orig_patent_app_number] => 11835687 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4500763 [patent_doc_number] => 07904851 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-08 [patent_title] => 'Photomask manufacturing method and semiconductor device manufacturing method' [patent_app_type] => utility [patent_app_number] => 11/878580 [patent_app_country] => US [patent_app_date] => 2007-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3560 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/904/07904851.pdf [firstpage_image] =>[orig_patent_app_number] => 11878580 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 166953 [patent_doc_number] => 07673281 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-02 [patent_title] => 'Pattern evaluation method and evaluation apparatus and pattern evaluation program' [patent_app_type] => utility [patent_app_number] => 11/878018 [patent_app_country] => US [patent_app_date] => 2007-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 6413 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/673/07673281.pdf [firstpage_image] =>[orig_patent_app_number] => 11878018 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 351013 [patent_doc_number] => 07496863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-24 [patent_title] => 'Nonlinear driver model for multi-driver systems' [patent_app_type] => utility [patent_app_number] => 11/779156 [patent_app_country] => US [patent_app_date] => 2007-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 6979 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/496/07496863.pdf [firstpage_image] =>[orig_patent_app_number] => 11779156 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8633005 [patent_doc_number] => 08365104 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-29 [patent_title] => 'Original data producing method and original data producing program' [patent_app_type] => utility [patent_app_number] => 11/775447 [patent_app_country] => US [patent_app_date] => 2007-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 51 [patent_no_of_words] => 20085 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11775447 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5047689 [patent_doc_number] => 20070266363 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-15 [patent_title] => 'SYSTEM AND METHOD OF AUTOMATICALLY GENERATING KERF DESIGN DATA' [patent_app_type] => utility [patent_app_number] => 11/763808 [patent_app_country] => US [patent_app_date] => 2007-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3943 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20070266363.pdf [firstpage_image] =>[orig_patent_app_number] => 11763808 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 597207 [patent_doc_number] => 07454728 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-18 [patent_title] => 'Metastability injector for a circuit description' [patent_app_type] => utility [patent_app_number] => 11/759888 [patent_app_country] => US [patent_app_date] => 2007-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 12222 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/454/07454728.pdf [firstpage_image] =>[orig_patent_app_number] => 11759888 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 220662 [patent_doc_number] => 07614021 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-11-03 [patent_title] => 'Optimal amplifier performance selection method' [patent_app_type] => utility [patent_app_number] => 11/752034 [patent_app_country] => US [patent_app_date] => 2007-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4351 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/614/07614021.pdf [firstpage_image] =>[orig_patent_app_number] => 11752034 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 69197 [patent_doc_number] => 07761817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-20 [patent_title] => 'Designing an ASIC based on execution of a software program on a processing system' [patent_app_type] => utility [patent_app_number] => 11/751994 [patent_app_country] => US [patent_app_date] => 2007-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7546 [patent_no_of_claims] => 72 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/761/07761817.pdf [firstpage_image] =>[orig_patent_app_number] => 11751994 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4979233 [patent_doc_number] => 20070220468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-20 [patent_title] => 'Method and Apparatus for Converting Globally Clock-Gated Circuits to Locally Clock-Gated Circuits' [patent_app_type] => utility [patent_app_number] => 11/752035 [patent_app_country] => US [patent_app_date] => 2007-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3347 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20070220468.pdf [firstpage_image] =>[orig_patent_app_number] => 11752035 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 213448 [patent_doc_number] => 07624367 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-24 [patent_title] => 'Method and system for routing' [patent_app_type] => utility [patent_app_number] => 11/751526 [patent_app_country] => US [patent_app_date] => 2007-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 45 [patent_no_of_words] => 7812 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/624/07624367.pdf [firstpage_image] =>[orig_patent_app_number] => 11751526 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4796126 [patent_doc_number] => 20080007712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-10 [patent_title] => 'TRACE DELAY ERROR COMPENSATION' [patent_app_type] => utility [patent_app_number] => 11/749897 [patent_app_country] => US [patent_app_date] => 2007-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1465 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20080007712.pdf [firstpage_image] =>[orig_patent_app_number] => 11749897 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5030090 [patent_doc_number] => 20070271537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-22 [patent_title] => 'COMMAND-LANGUAGE-BASED FUNCTIONAL ENGINEERING CHANGE ORDER (ECO) IMPLEMENTATION' [patent_app_type] => utility [patent_app_number] => 11/749904 [patent_app_country] => US [patent_app_date] => 2007-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4198 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0271/20070271537.pdf [firstpage_image] =>[orig_patent_app_number] => 11749904 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5030086 [patent_doc_number] => 20070271533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-22 [patent_title] => 'SYSTEM LSI VERIFICATION SYSTEM AND SYSTEM LSI VERIFICATION METHOD' [patent_app_type] => utility [patent_app_number] => 11/749468 [patent_app_country] => US [patent_app_date] => 2007-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5714 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0271/20070271533.pdf [firstpage_image] =>[orig_patent_app_number] => 11749468 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4780444 [patent_doc_number] => 20080288443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'Customizable Joint Type Assignment Method And Apparatus' [patent_app_type] => utility [patent_app_number] => 11/749223 [patent_app_country] => US [patent_app_date] => 2007-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2794 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0288/20080288443.pdf [firstpage_image] =>[orig_patent_app_number] => 11749223 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 188594 [patent_doc_number] => 07650581 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-19 [patent_title] => 'Method for modeling and verifying timing exceptions' [patent_app_type] => utility [patent_app_number] => 11/749090 [patent_app_country] => US [patent_app_date] => 2007-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2964 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/650/07650581.pdf [firstpage_image] =>[orig_patent_app_number] => 11749090 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7593626 [patent_doc_number] => 07627841 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-01 [patent_title] => 'Efficient method to predict integrated circuit temperature and power maps' [patent_app_type] => utility [patent_app_number] => 11/787108 [patent_app_country] => US [patent_app_date] => 2007-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 19 [patent_no_of_words] => 4717 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/627/07627841.pdf [firstpage_image] =>[orig_patent_app_number] => 11787108 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4961247 [patent_doc_number] => 20080275672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-06 [patent_title] => 'Reliability Simulation Method and System' [patent_app_type] => utility [patent_app_number] => 11/666498 [patent_app_country] => US [patent_app_date] => 2007-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 53 [patent_no_of_words] => 18266 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11666498 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4991008 [patent_doc_number] => 20070157349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-05 [patent_title] => 'Method of Fabricating an Integrated Circuit to Improve Soft Error Performance' [patent_app_type] => utility [patent_app_number] => 11/683278 [patent_app_country] => US [patent_app_date] => 2007-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3543 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20070157349.pdf [firstpage_image] =>[orig_patent_app_number] => 11683278 [rel_patent_id] =>[rel_patent_doc_number] =>)