Search

Maliheh Malek

Examiner (ID: 3860, Phone: (571)270-1874 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
778
Issued Applications
579
Pending Applications
69
Abandoned Applications
142

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18782295 [patent_doc_number] => 11824062 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Thin film transistor, method for manufacturing the same, and semiconductor device [patent_app_type] => utility [patent_app_number] => 17/313034 [patent_app_country] => US [patent_app_date] => 2021-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 31 [patent_no_of_words] => 11690 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17313034 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/313034
Thin film transistor, method for manufacturing the same, and semiconductor device May 5, 2021 Issued
Array ( [id] => 17011132 [patent_doc_number] => 20210242293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-05 [patent_title] => DISPLAY PANEL AND DISPLAY APPARATUS INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/238108 [patent_app_country] => US [patent_app_date] => 2021-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6208 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17238108 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/238108
Display panel and display apparatus including the same Apr 21, 2021 Issued
Array ( [id] => 19973962 [patent_doc_number] => 12342595 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-24 [patent_title] => Transistor cell with self-aligned gate contact [patent_app_type] => utility [patent_app_number] => 17/235491 [patent_app_country] => US [patent_app_date] => 2021-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 3684 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17235491 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/235491
Transistor cell with self-aligned gate contact Apr 19, 2021 Issued
Array ( [id] => 16995710 [patent_doc_number] => 20210234130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-29 [patent_title] => Barrier Film Laminate Comprising Submicron Getter Particles and Electronic Device Comprising Such a Laminate [patent_app_type] => utility [patent_app_number] => 17/228640 [patent_app_country] => US [patent_app_date] => 2021-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6852 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17228640 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/228640
Barrier Film Laminate Comprising Submicron Getter Particles and Electronic Device Comprising Such a Laminate Apr 11, 2021 Abandoned
Array ( [id] => 19679327 [patent_doc_number] => 12191199 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-07 [patent_title] => Contact metallization process [patent_app_type] => utility [patent_app_number] => 17/216444 [patent_app_country] => US [patent_app_date] => 2021-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6007 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17216444 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/216444
Contact metallization process Mar 28, 2021 Issued
Array ( [id] => 16812439 [patent_doc_number] => 20210134994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) [patent_app_type] => utility [patent_app_number] => 17/145414 [patent_app_country] => US [patent_app_date] => 2021-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2375 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17145414 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/145414
High electron mobility transistor (HEMT) Jan 10, 2021 Issued
Array ( [id] => 16858560 [patent_doc_number] => 20210159305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-27 [patent_title] => DISPLAY APPARATUS INCLUDING CONDUCTIVE PATTERN IN SUBSTRATE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/142220 [patent_app_country] => US [patent_app_date] => 2021-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10210 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17142220 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/142220
Display apparatus including conductive pattern in substrate and method of manufacturing the same Jan 4, 2021 Issued
Array ( [id] => 16781940 [patent_doc_number] => 20210119019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => VERTICAL FIN FIELD EFFECT TRANSISTOR DEVICES WITH REDUCED TOP SOURCE/DRAIN VARIABILITY AND LOWER RESISTANCE [patent_app_type] => utility [patent_app_number] => 17/136548 [patent_app_country] => US [patent_app_date] => 2020-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7658 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17136548 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/136548
Vertical fin field effect transistor devices with reduced top source/drain variability and lower resistance Dec 28, 2020 Issued
Array ( [id] => 17486253 [patent_doc_number] => 20220093757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => MIDDLE-OF-LINE INTERCONNECT STRUCTURE AND MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 17/134830 [patent_app_country] => US [patent_app_date] => 2020-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7876 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17134830 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/134830
Middle-of-line interconnect structure and manufacturing method Dec 27, 2020 Issued
Array ( [id] => 17040855 [patent_doc_number] => 20210257491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-19 [patent_title] => MULTI-GATE SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/132293 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6526 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17132293 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/132293
Multi-gate semiconductor structure and method of manufacturing the same Dec 22, 2020 Issued
Array ( [id] => 17174364 [patent_doc_number] => 20210328035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/120784 [patent_app_country] => US [patent_app_date] => 2020-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9777 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17120784 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/120784
Semiconductor devices Dec 13, 2020 Issued
Array ( [id] => 19654605 [patent_doc_number] => 12176406 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-24 [patent_title] => Trench MOSFET and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/113305 [patent_app_country] => US [patent_app_date] => 2020-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4420 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17113305 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/113305
Trench MOSFET and method for manufacturing the same Dec 6, 2020 Issued
Array ( [id] => 16889135 [patent_doc_number] => 20210175332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-10 [patent_title] => SEMICONDUCTOR DEVICE WITH U-SHAPED CHANNEL AND ELECTRONIC APPARATUS INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/112343 [patent_app_country] => US [patent_app_date] => 2020-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9843 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -38 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17112343 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/112343
Semiconductor device with u-shaped channel and electronic apparatus including the same Dec 3, 2020 Issued
Array ( [id] => 18402184 [patent_doc_number] => 11664333 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-30 [patent_title] => Method of manufacturing die seal ring [patent_app_type] => utility [patent_app_number] => 17/103584 [patent_app_country] => US [patent_app_date] => 2020-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 4919 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17103584 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/103584
Method of manufacturing die seal ring Nov 23, 2020 Issued
Array ( [id] => 20625941 [patent_doc_number] => 12593466 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-31 [patent_title] => Power field-effect transistor and manufacturing method [patent_app_type] => utility [patent_app_number] => 18/035086 [patent_app_country] => US [patent_app_date] => 2020-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 2169 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 319 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18035086 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/035086
Power field-effect transistor and manufacturing method Nov 3, 2020 Issued
Array ( [id] => 19460231 [patent_doc_number] => 12100741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Lateral double-diffused transistor and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/086255 [patent_app_country] => US [patent_app_date] => 2020-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 6864 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17086255 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/086255
Lateral double-diffused transistor and manufacturing method thereof Oct 29, 2020 Issued
Array ( [id] => 18039969 [patent_doc_number] => 20220384186 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => METHODS TO ENABLE SEAMLESS HIGH QUALITY GAPFILL [patent_app_type] => utility [patent_app_number] => 17/755269 [patent_app_country] => US [patent_app_date] => 2020-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10087 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17755269 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/755269
METHODS TO ENABLE SEAMLESS HIGH QUALITY GAPFILL Oct 28, 2020 Abandoned
Array ( [id] => 19153850 [patent_doc_number] => 11978774 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => High voltage field effect transistor with vertical current paths and method of making the same [patent_app_type] => utility [patent_app_number] => 17/063084 [patent_app_country] => US [patent_app_date] => 2020-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 70 [patent_figures_cnt] => 70 [patent_no_of_words] => 22531 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 373 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17063084 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/063084
High voltage field effect transistor with vertical current paths and method of making the same Oct 4, 2020 Issued
Array ( [id] => 17145429 [patent_doc_number] => 20210313442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => SEMICONDUCTOR DEVICES INCLUDING GATE SPACER [patent_app_type] => utility [patent_app_number] => 17/060193 [patent_app_country] => US [patent_app_date] => 2020-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10315 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17060193 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/060193
Semiconductor devices including gate spacer Sep 30, 2020 Issued
Array ( [id] => 20230473 [patent_doc_number] => 12419138 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => Method of manufacturing a semiconductor structure, which can be applied to full-color LED [patent_app_type] => utility [patent_app_number] => 17/925303 [patent_app_country] => US [patent_app_date] => 2020-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 0 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17925303 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/925303
Method of manufacturing a semiconductor structure, which can be applied to full-color LED Sep 21, 2020 Issued
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