
Mamadou L. Diallo
Examiner (ID: 18306)
| Most Active Art Unit | 2895 |
| Art Unit(s) | 3648, 2897, 2819, 2895, 2811, 4174 |
| Total Applications | 1724 |
| Issued Applications | 1539 |
| Pending Applications | 108 |
| Abandoned Applications | 112 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17063174
[patent_doc_number] => 11107784
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-08-31
[patent_title] => Semiconductor device having circuit board to which contact part is bonded
[patent_app_type] => utility
[patent_app_number] => 16/800764
[patent_app_country] => US
[patent_app_date] => 2020-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 6603
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16800764
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/800764 | Semiconductor device having circuit board to which contact part is bonded | Feb 24, 2020 | Issued |
Array
(
[id] => 16835224
[patent_doc_number] => 11011484
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-05-18
[patent_title] => Semiconductor device having first and second terminals
[patent_app_type] => utility
[patent_app_number] => 16/799024
[patent_app_country] => US
[patent_app_date] => 2020-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 17
[patent_no_of_words] => 7263
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16799024
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/799024 | Semiconductor device having first and second terminals | Feb 23, 2020 | Issued |
Array
(
[id] => 16624938
[patent_doc_number] => 20210043591
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-11
[patent_title] => SEMICONDUCTOR DEVICES INCLUDING A THICK METAL LAYER AND A BUMP
[patent_app_type] => utility
[patent_app_number] => 16/795658
[patent_app_country] => US
[patent_app_date] => 2020-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8709
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16795658
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/795658 | Semiconductor devices including a thick metal layer and a bump | Feb 19, 2020 | Issued |
Array
(
[id] => 16586142
[patent_doc_number] => 20210020544
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-01-21
[patent_title] => SEMICONDUCTOR DEVICE INCLUDING THROUGH SUBSTRATE VIAS AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/795686
[patent_app_country] => US
[patent_app_date] => 2020-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13448
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16795686
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/795686 | Semiconductor device including through substrate vias and method of manufacturing the semiconductor device | Feb 19, 2020 | Issued |
Array
(
[id] => 16819995
[patent_doc_number] => 11004833
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-05-11
[patent_title] => Multi-chip stacked devices
[patent_app_type] => utility
[patent_app_number] => 16/792560
[patent_app_country] => US
[patent_app_date] => 2020-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 12413
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16792560
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/792560 | Multi-chip stacked devices | Feb 16, 2020 | Issued |
Array
(
[id] => 16256805
[patent_doc_number] => 20200266180
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-20
[patent_title] => INTEGRATED DISPLAY DEVICES
[patent_app_type] => utility
[patent_app_number] => 16/787542
[patent_app_country] => US
[patent_app_date] => 2020-02-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11059
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -31
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16787542
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/787542 | Integrated display devices | Feb 10, 2020 | Issued |
Array
(
[id] => 17152475
[patent_doc_number] => 11145566
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-10-12
[patent_title] => Stacked silicon package assembly having thermal management
[patent_app_type] => utility
[patent_app_number] => 16/786447
[patent_app_country] => US
[patent_app_date] => 2020-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 18
[patent_no_of_words] => 12782
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16786447
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/786447 | Stacked silicon package assembly having thermal management | Feb 9, 2020 | Issued |
Array
(
[id] => 17025549
[patent_doc_number] => 20210249421
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-08-12
[patent_title] => MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/786099
[patent_app_country] => US
[patent_app_date] => 2020-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8209
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16786099
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/786099 | One-time programmable memory device including anti-fuse element and manufacturing method thereof | Feb 9, 2020 | Issued |
Array
(
[id] => 16210496
[patent_doc_number] => 20200243486
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-07-30
[patent_title] => DEVICE WITH EMBEDDED HIGH-BANDWIDTH, HIGH-CAPACITY MEMORY USING WAFER BONDING
[patent_app_type] => utility
[patent_app_number] => 16/776279
[patent_app_country] => US
[patent_app_date] => 2020-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12039
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -67
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16776279
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/776279 | Device with embedded high-bandwidth, high-capacity memory using wafer bonding | Jan 28, 2020 | Issued |
Array
(
[id] => 16995460
[patent_doc_number] => 20210233880
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-29
[patent_title] => SEMICONDUCTOR DEVICES INCLUDING ARRAY POWER PADS, AND ASSOCIATED SEMICONDUCTOR DEVICE PACKAGES AND SYSTEMS
[patent_app_type] => utility
[patent_app_number] => 16/774911
[patent_app_country] => US
[patent_app_date] => 2020-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7572
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 44
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16774911
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/774911 | Semiconductor devices including array power pads, and associated semiconductor device packages and systems | Jan 27, 2020 | Issued |
Array
(
[id] => 16226314
[patent_doc_number] => 20200251431
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-06
[patent_title] => METHOD OF PRODUCING A SUBSTRATE AND SYSTEM FOR PRODUCING A SUBSTRATE
[patent_app_type] => utility
[patent_app_number] => 16/751937
[patent_app_country] => US
[patent_app_date] => 2020-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15646
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16751937
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/751937 | Method of producing a substrate and system for producing a substrate | Jan 23, 2020 | Issued |
Array
(
[id] => 17122077
[patent_doc_number] => 11133218
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-09-28
[patent_title] => Semiconductor apparatus having through silicon via structure and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 16/750909
[patent_app_country] => US
[patent_app_date] => 2020-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 23
[patent_no_of_words] => 7037
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16750909
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/750909 | Semiconductor apparatus having through silicon via structure and manufacturing method thereof | Jan 22, 2020 | Issued |
Array
(
[id] => 15906413
[patent_doc_number] => 20200152727
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-14
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/745638
[patent_app_country] => US
[patent_app_date] => 2020-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7756
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16745638
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/745638 | Display device | Jan 16, 2020 | Issued |
Array
(
[id] => 15906413
[patent_doc_number] => 20200152727
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-14
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/745638
[patent_app_country] => US
[patent_app_date] => 2020-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7756
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16745638
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/745638 | Display device | Jan 16, 2020 | Issued |
Array
(
[id] => 15906413
[patent_doc_number] => 20200152727
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-14
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/745638
[patent_app_country] => US
[patent_app_date] => 2020-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7756
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16745638
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/745638 | Display device | Jan 16, 2020 | Issued |
Array
(
[id] => 15906413
[patent_doc_number] => 20200152727
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-14
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/745638
[patent_app_country] => US
[patent_app_date] => 2020-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7756
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16745638
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/745638 | Display device | Jan 16, 2020 | Issued |
Array
(
[id] => 19980253
[patent_doc_number] => 12347741
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-01
[patent_title] => Semiconductor device comprising a resin member having a rib including a lower end located below lower ends of a plurality of pin fins and semiconductor device manufacturing method
[patent_app_type] => utility
[patent_app_number] => 17/755916
[patent_app_country] => US
[patent_app_date] => 2020-01-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 0
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17755916
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/755916 | Semiconductor device comprising a resin member having a rib including a lower end located below lower ends of a plurality of pin fins and semiconductor device manufacturing method | Jan 7, 2020 | Issued |
Array
(
[id] => 16873572
[patent_doc_number] => 20210167039
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-03
[patent_title] => CHIP PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/736741
[patent_app_country] => US
[patent_app_date] => 2020-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9403
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16736741
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/736741 | Chip package structure with stacked chips and manufacturing method thereof | Jan 6, 2020 | Issued |
Array
(
[id] => 16493698
[patent_doc_number] => 10859732
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-08
[patent_title] => Long-range temperature forecasting
[patent_app_type] => utility
[patent_app_number] => 16/736060
[patent_app_country] => US
[patent_app_date] => 2020-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 19341
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16736060
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/736060 | Long-range temperature forecasting | Jan 6, 2020 | Issued |
Array
(
[id] => 17181302
[patent_doc_number] => 11158551
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-10-26
[patent_title] => Modular WLCSP die daisy chain design for multiple die sizes
[patent_app_type] => utility
[patent_app_number] => 16/736077
[patent_app_country] => US
[patent_app_date] => 2020-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 2424
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16736077
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/736077 | Modular WLCSP die daisy chain design for multiple die sizes | Jan 6, 2020 | Issued |