Search

Mandish K. Randhawa

Examiner (ID: 12075, Phone: (571)270-5650 , Office: P/2475 )

Most Active Art Unit
2477
Art Unit(s)
2419, 2415, 2475, 2477
Total Applications
630
Issued Applications
361
Pending Applications
97
Abandoned Applications
193

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11528025 [patent_doc_number] => 20170088002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-30 [patent_title] => 'BATTERY STATE OF CHARGE ESTIMATION BASED ON CURRENT PULSE DURATION' [patent_app_type] => utility [patent_app_number] => 14/867579 [patent_app_country] => US [patent_app_date] => 2015-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5927 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14867579 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/867579
Battery state of charge estimation based on current pulse duration Sep 27, 2015 Issued
Array ( [id] => 10673817 [patent_doc_number] => 20160019962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'RESISTANCE CHANGE MEMORY CELL CIRCUITS AND METHODS' [patent_app_type] => utility [patent_app_number] => 14/866920 [patent_app_country] => US [patent_app_date] => 2015-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8389 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14866920 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/866920
Resistance change memory cell circuits and methods Sep 25, 2015 Issued
Array ( [id] => 13816417 [patent_doc_number] => 10184974 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-22 [patent_title] => Systems and methods for determining whether a circuit is operating properly [patent_app_type] => utility [patent_app_number] => 14/861214 [patent_app_country] => US [patent_app_date] => 2015-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 10345 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14861214 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/861214
Systems and methods for determining whether a circuit is operating properly Sep 21, 2015 Issued
Array ( [id] => 11517240 [patent_doc_number] => 20170084314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-23 [patent_title] => 'SINGLE ENDED BITLINE CURRENT SENSE AMPLIFIER FOR SRAM APPLICATIONS' [patent_app_type] => utility [patent_app_number] => 14/856638 [patent_app_country] => US [patent_app_date] => 2015-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4166 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14856638 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/856638
Single ended bitline current sense amplifier for SRAM applications Sep 16, 2015 Issued
Array ( [id] => 10659315 [patent_doc_number] => 20160005458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-07 [patent_title] => 'Systems and Methods of Sectioned Bit Line Memory Arrays, Including Hierarchical and/or Other Features' [patent_app_type] => utility [patent_app_number] => 14/855316 [patent_app_country] => US [patent_app_date] => 2015-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 9798 [patent_no_of_claims] => 135 [patent_no_of_ind_claims] => 22 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14855316 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/855316
Systems and Methods of Sectioned Bit Line Memory Arrays, Including Hierarchical and/or Other Features Sep 14, 2015 Abandoned
Array ( [id] => 11787349 [patent_doc_number] => 09396804 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-07-19 [patent_title] => 'Memory programming method, memory control circuit unit and memory storage apparatus' [patent_app_type] => utility [patent_app_number] => 14/854056 [patent_app_country] => US [patent_app_date] => 2015-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 46 [patent_no_of_words] => 11035 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14854056 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/854056
Memory programming method, memory control circuit unit and memory storage apparatus Sep 14, 2015 Issued
Array ( [id] => 11802102 [patent_doc_number] => 09542994 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-01-10 [patent_title] => 'Retention control in a memory device' [patent_app_type] => utility [patent_app_number] => 14/855068 [patent_app_country] => US [patent_app_date] => 2015-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 8092 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14855068 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/855068
Retention control in a memory device Sep 14, 2015 Issued
Array ( [id] => 11321435 [patent_doc_number] => 09520181 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-12-13 [patent_title] => 'Superconducting phase-controlled hysteretic magnetic Josephson junction JMRAM memory cell' [patent_app_type] => utility [patent_app_number] => 14/854994 [patent_app_country] => US [patent_app_date] => 2015-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 10513 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14854994 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/854994
Superconducting phase-controlled hysteretic magnetic Josephson junction JMRAM memory cell Sep 14, 2015 Issued
Array ( [id] => 11502637 [patent_doc_number] => 20170076822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'CASIMIR EFFECT MEMORY CELL' [patent_app_type] => utility [patent_app_number] => 14/853044 [patent_app_country] => US [patent_app_date] => 2015-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6613 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14853044 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/853044
Casimir effect memory cell Sep 13, 2015 Issued
Array ( [id] => 11510030 [patent_doc_number] => 09601193 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-03-21 [patent_title] => 'Cross point memory control' [patent_app_type] => utility [patent_app_number] => 14/853246 [patent_app_country] => US [patent_app_date] => 2015-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 12701 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14853246 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/853246
Cross point memory control Sep 13, 2015 Issued
Array ( [id] => 10659618 [patent_doc_number] => 20160005762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-07 [patent_title] => 'MULTIPLE-BIT-PER-CELL, INDEPENDENT DOUBLE GATE, VERTICAL CHANNEL MEMORY HAVING SPLIT CHANNEL' [patent_app_type] => utility [patent_app_number] => 14/852997 [patent_app_country] => US [patent_app_date] => 2015-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 12923 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14852997 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/852997
Multiple-bit-per-cell, independent double gate, vertical channel memory having split channel Sep 13, 2015 Issued
Array ( [id] => 11791586 [patent_doc_number] => 09401226 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-07-26 [patent_title] => 'MRAM initialization devices and methods' [patent_app_type] => utility [patent_app_number] => 14/853860 [patent_app_country] => US [patent_app_date] => 2015-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8968 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14853860 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/853860
MRAM initialization devices and methods Sep 13, 2015 Issued
Array ( [id] => 11564423 [patent_doc_number] => 09627015 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-18 [patent_title] => 'Memory device having page state informing function' [patent_app_type] => utility [patent_app_number] => 14/852890 [patent_app_country] => US [patent_app_date] => 2015-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 13090 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14852890 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/852890
Memory device having page state informing function Sep 13, 2015 Issued
Array ( [id] => 11764951 [patent_doc_number] => 09373391 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-06-21 [patent_title] => 'Resistive memory apparatus' [patent_app_type] => utility [patent_app_number] => 14/850974 [patent_app_country] => US [patent_app_date] => 2015-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3804 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14850974 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/850974
Resistive memory apparatus Sep 10, 2015 Issued
Array ( [id] => 10496177 [patent_doc_number] => 20150381199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'COMPARATORS FOR DELTA-SIGMA MODULATORS' [patent_app_type] => utility [patent_app_number] => 14/849280 [patent_app_country] => US [patent_app_date] => 2015-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 11313 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14849280 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/849280
Comparators for delta-sigma modulators Sep 8, 2015 Issued
Array ( [id] => 11494071 [patent_doc_number] => 20170068256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-09 [patent_title] => 'SYSTEM FOR OPTIMIZING CONTROL DEVICES FOR A SPACE ENVIRONMENT' [patent_app_type] => utility [patent_app_number] => 14/849430 [patent_app_country] => US [patent_app_date] => 2015-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 4535 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14849430 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/849430
System for optimizing control devices for a space environment Sep 8, 2015 Issued
Array ( [id] => 10486702 [patent_doc_number] => 20150371722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-24 [patent_title] => 'CONTROLLER TO DETECT MALFUNCTIONING ADDRESS OF MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/840989 [patent_app_country] => US [patent_app_date] => 2015-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9168 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14840989 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/840989
Controller to detect malfunctioning address of memory device Aug 30, 2015 Issued
Array ( [id] => 10751664 [patent_doc_number] => 20160097816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-07 [patent_title] => 'Estimation Method for State of Charge of Lithium Iron Phosphate Power Battery Packs' [patent_app_type] => utility [patent_app_number] => 14/830763 [patent_app_country] => US [patent_app_date] => 2015-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3226 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14830763 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/830763
Estimation Method for State of Charge of Lithium Iron Phosphate Power Battery Packs Aug 19, 2015 Abandoned
Array ( [id] => 10610751 [patent_doc_number] => 09330789 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-03 [patent_title] => 'Short-checking methods' [patent_app_type] => utility [patent_app_number] => 14/828662 [patent_app_country] => US [patent_app_date] => 2015-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6689 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14828662 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/828662
Short-checking methods Aug 17, 2015 Issued
Array ( [id] => 11246204 [patent_doc_number] => 09472249 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-18 [patent_title] => 'Techniques for accessing a dynamic random access memory array' [patent_app_type] => utility [patent_app_number] => 14/829306 [patent_app_country] => US [patent_app_date] => 2015-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7912 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14829306 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/829306
Techniques for accessing a dynamic random access memory array Aug 17, 2015 Issued
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