Search

Mang Hang Yeung

Examiner (ID: 1315, Phone: (571)270-7319 , Office: P/2463 )

Most Active Art Unit
2463
Art Unit(s)
2416, 2463
Total Applications
761
Issued Applications
610
Pending Applications
64
Abandoned Applications
87

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16095479 [patent_doc_number] => 20200201726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-25 [patent_title] => CONTROLLER, MEMORY SYSTEM INCLUDING THE CONTROLLER, AND OPERATING METHOD OF THE MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 16/460422 [patent_app_country] => US [patent_app_date] => 2019-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10698 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16460422 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/460422
Controller, memory system including the controller, and operating method of the memory system Jul 1, 2019 Issued
Array ( [id] => 16478218 [patent_doc_number] => 10853166 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Object format resilient to remote object store errors [patent_app_type] => utility [patent_app_number] => 16/459790 [patent_app_country] => US [patent_app_date] => 2019-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9252 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16459790 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/459790
Object format resilient to remote object store errors Jul 1, 2019 Issued
Array ( [id] => 15869189 [patent_doc_number] => 20200141998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => POWER GATING SYSTEM [patent_app_type] => utility [patent_app_number] => 16/459434 [patent_app_country] => US [patent_app_date] => 2019-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5237 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16459434 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/459434
Power gating system Jun 30, 2019 Issued
Array ( [id] => 16652045 [patent_doc_number] => 10929224 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-23 [patent_title] => Partial XOR protection [patent_app_type] => utility [patent_app_number] => 16/447861 [patent_app_country] => US [patent_app_date] => 2019-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10884 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16447861 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/447861
Partial XOR protection Jun 19, 2019 Issued
Array ( [id] => 16529554 [patent_doc_number] => 20200403635 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => DECODING SYSTEM AND DECODING METHOD [patent_app_type] => utility [patent_app_number] => 16/446758 [patent_app_country] => US [patent_app_date] => 2019-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3668 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16446758 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/446758
Decoding system and decoding method Jun 19, 2019 Issued
Array ( [id] => 15327005 [patent_doc_number] => 20200003832 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => SEMICONDUCTOR PRODUCT QUALITY MANAGEMENT SERVER, SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR PRODUCT QUALITY MANAGEMENT SYSTEM [patent_app_type] => utility [patent_app_number] => 16/447529 [patent_app_country] => US [patent_app_date] => 2019-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5605 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16447529 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/447529
Semiconductor product quality management server, semiconductor device, and semiconductor product quality management system Jun 19, 2019 Issued
Array ( [id] => 18292924 [patent_doc_number] => 11621802 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => Turbo decoder with reduced processing and minimal re-transmission [patent_app_type] => utility [patent_app_number] => 17/290434 [patent_app_country] => US [patent_app_date] => 2019-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4529 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17290434 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/290434
Turbo decoder with reduced processing and minimal re-transmission Jun 12, 2019 Issued
Array ( [id] => 16700581 [patent_doc_number] => 10951201 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-16 [patent_title] => Flip flop standard cell [patent_app_type] => utility [patent_app_number] => 16/428123 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7452 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16428123 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/428123
Flip flop standard cell May 30, 2019 Issued
Array ( [id] => 16247447 [patent_doc_number] => 10746798 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-08-18 [patent_title] => Field adaptable in-system test mechanisms [patent_app_type] => utility [patent_app_number] => 16/428790 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 7822 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16428790 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/428790
Field adaptable in-system test mechanisms May 30, 2019 Issued
Array ( [id] => 14872545 [patent_doc_number] => 20190286514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => CRC COUNTER NORMALIZATION [patent_app_type] => utility [patent_app_number] => 16/428232 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5262 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16428232 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/428232
CRC COUNTER NORMALIZATION May 30, 2019 Abandoned
Array ( [id] => 16486236 [patent_doc_number] => 20200379841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => PERFORMING ERROR DETECTION DURING DETERMINISTIC PROGRAM EXECUTION [patent_app_type] => utility [patent_app_number] => 16/428558 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6983 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16428558 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/428558
Performing error detection during deterministic program execution May 30, 2019 Issued
Array ( [id] => 14811207 [patent_doc_number] => 20190272213 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-05 [patent_title] => SHARED ADDRESS COUNTERS FOR MULTIPLE MODES OF OPERATION IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/418529 [patent_app_country] => US [patent_app_date] => 2019-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6449 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16418529 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/418529
Shared address counters for multiple modes of operation in a memory device May 20, 2019 Issued
Array ( [id] => 16370973 [patent_doc_number] => 10802728 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Storage device and operating method of storage device [patent_app_type] => utility [patent_app_number] => 16/416750 [patent_app_country] => US [patent_app_date] => 2019-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11733 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16416750 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/416750
Storage device and operating method of storage device May 19, 2019 Issued
Array ( [id] => 16636889 [patent_doc_number] => 10915398 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Memory system and operating method thereof [patent_app_type] => utility [patent_app_number] => 16/415843 [patent_app_country] => US [patent_app_date] => 2019-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 10931 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16415843 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/415843
Memory system and operating method thereof May 16, 2019 Issued
Array ( [id] => 16638670 [patent_doc_number] => 10917195 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Control channel mother code determination for multi-transmission configuration indication communication [patent_app_type] => utility [patent_app_number] => 16/415641 [patent_app_country] => US [patent_app_date] => 2019-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 29165 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16415641 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/415641
Control channel mother code determination for multi-transmission configuration indication communication May 16, 2019 Issued
Array ( [id] => 15548941 [patent_doc_number] => 10574266 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-25 [patent_title] => Channel coding method and apparatus in communication system [patent_app_type] => utility [patent_app_number] => 16/398282 [patent_app_country] => US [patent_app_date] => 2019-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 28152 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16398282 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/398282
Channel coding method and apparatus in communication system Apr 29, 2019 Issued
Array ( [id] => 14719849 [patent_doc_number] => 20190250988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => MULTIPLE WIRELESS COMMUNICATION SYSTEMS STREAM SLICES BASED ON GEOGRAPHY [patent_app_type] => utility [patent_app_number] => 16/391389 [patent_app_country] => US [patent_app_date] => 2019-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10434 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16391389 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/391389
MULTIPLE WIRELESS COMMUNICATION SYSTEMS STREAM SLICES BASED ON GEOGRAPHY Apr 22, 2019 Abandoned
Array ( [id] => 16370327 [patent_doc_number] => 10802077 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-13 [patent_title] => Test circuit for dynamic checking for faults on functional and BIST clock paths to memory in both ATPG and LBIST modes [patent_app_type] => utility [patent_app_number] => 16/387809 [patent_app_country] => US [patent_app_date] => 2019-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3153 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16387809 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/387809
Test circuit for dynamic checking for faults on functional and BIST clock paths to memory in both ATPG and LBIST modes Apr 17, 2019 Issued
Array ( [id] => 16395305 [patent_doc_number] => 20200336246 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => ERROR CONTROL CODING WITH DYNAMIC RANGES [patent_app_type] => utility [patent_app_number] => 16/387802 [patent_app_country] => US [patent_app_date] => 2019-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14325 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16387802 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/387802
Error control coding with dynamic ranges Apr 17, 2019 Issued
Array ( [id] => 16338168 [patent_doc_number] => 10789125 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-29 [patent_title] => Memory system and method [patent_app_type] => utility [patent_app_number] => 16/380003 [patent_app_country] => US [patent_app_date] => 2019-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 14599 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16380003 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/380003
Memory system and method Apr 9, 2019 Issued
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