Mang Hang Yeung

Array ( [id] => 9585904 [patent_doc_number] => 08775915 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'Apparatus and method for a dual mode standard and layered belief propagation LDPC decoder' [patent_app_type] => utility [patent_app_number] => 13/369038 [patent_app_country] => US [patent_app_date] => 2012-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4628 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13369038 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8325892 [patent_doc_number] => 20120198305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-02 [patent_title] => 'METHODS AND APPARATUS FOR FAST SYNCHRONIZATION USING QUASI-CYCLIC LOW-DENSITY PARITY-CHECK (QC-LDPC) CODES' [patent_app_type] => utility [patent_app_number] => 13/360228 [patent_app_country] => US [patent_app_date] => 2012-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6356 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13360228 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8285782 [patent_doc_number] => 08219897 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-10 [patent_title] => 'Low complexity decoding of low density parity check codes' [patent_app_type] => utility [patent_app_number] => 13/346513 [patent_app_country] => US [patent_app_date] => 2012-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 6193 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13346513 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8182893 [patent_doc_number] => 20120113925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-10 [patent_title] => 'METHOD FOR EFFECTIVELY TRANSMITTING CONTROL SIGNAL IN WIRELESS COMMUNICATION SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/345532 [patent_app_country] => US [patent_app_date] => 2012-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9590 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20120113925.pdf [firstpage_image] =>[orig_patent_app_number] => 13345532 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8906474 [patent_doc_number] => 20130173977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-04 [patent_title] => 'HIGH DENSITY FLIP-FLOP WITH ASYNCHRONOUS RESET' [patent_app_type] => utility [patent_app_number] => 13/342030 [patent_app_country] => US [patent_app_date] => 2011-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5989 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13342030 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8904532 [patent_doc_number] => 20130172035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-04 [patent_title] => 'METHOD AND APPARATUS FOR ACKNOWLEDGEMENT USING A GROUP IDENTIFIER' [patent_app_type] => utility [patent_app_number] => 13/338764 [patent_app_country] => US [patent_app_date] => 2011-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8906 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13338764 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8667593 [patent_doc_number] => 08381066 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-19 [patent_title] => 'Semiconductor storage device, method of controlling the same, and error correction system' [patent_app_type] => utility [patent_app_number] => 13/334438 [patent_app_country] => US [patent_app_date] => 2011-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 22 [patent_no_of_words] => 10571 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13334438 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8273207 [patent_doc_number] => 08214729 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-03 [patent_title] => 'Error detecting/correcting scheme for memories' [patent_app_type] => utility [patent_app_number] => 13/335725 [patent_app_country] => US [patent_app_date] => 2011-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 5541 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13335725 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9386277 [patent_doc_number] => 20140089760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-27 [patent_title] => 'STORAGE OF CODEWORD PORTIONS' [patent_app_type] => utility [patent_app_number] => 13/991400 [patent_app_country] => US [patent_app_date] => 2011-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5334 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13991400 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8158373 [patent_doc_number] => 08171369 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-01 [patent_title] => 'DTV transmitting system and receiving system and method of processing broadcast data' [patent_app_type] => utility [patent_app_number] => 13/324914 [patent_app_country] => US [patent_app_date] => 2011-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 28926 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/171/08171369.pdf [firstpage_image] =>[orig_patent_app_number] => 13324914 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8098023 [patent_doc_number] => 20120084620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-05 [patent_title] => 'TRANSMISSION DEVICE AND RECEIVING DEVICE' [patent_app_type] => utility [patent_app_number] => 13/323383 [patent_app_country] => US [patent_app_date] => 2011-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6751 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20120084620.pdf [firstpage_image] =>[orig_patent_app_number] => 13323383 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8530678 [patent_doc_number] => 08307262 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-06 [patent_title] => 'Data read-out circuit in semiconductor memory device and method of data reading in semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/306229 [patent_app_country] => US [patent_app_date] => 2011-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 12649 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13306229 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8843405 [patent_doc_number] => 20130139033 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-30 [patent_title] => 'TECHNIQUES FOR EMBEDDED MEMORY SELF REPAIR' [patent_app_type] => utility [patent_app_number] => 13/304838 [patent_app_country] => US [patent_app_date] => 2011-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3404 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13304838 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8046179 [patent_doc_number] => 20120072812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-22 [patent_title] => 'DISTRIBUTED CHECKSUM COMPUTATION' [patent_app_type] => utility [patent_app_number] => 13/304351 [patent_app_country] => US [patent_app_date] => 2011-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7955 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20120072812.pdf [firstpage_image] =>[orig_patent_app_number] => 13304351 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9611700 [patent_doc_number] => 08788889 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-22 [patent_title] => 'Bit stream aliasing in memory system with probabilistic decoding' [patent_app_type] => utility [patent_app_number] => 13/304272 [patent_app_country] => US [patent_app_date] => 2011-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 11024 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13304272 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9458660 [patent_doc_number] => 08719686 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-06 [patent_title] => 'Probability-based multi-level LDPC decoder' [patent_app_type] => utility [patent_app_number] => 13/302119 [patent_app_country] => US [patent_app_date] => 2011-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 6412 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13302119 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8337378 [patent_doc_number] => 20120204079 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-09 [patent_title] => 'SYSTEM AND METHOD OF INTERFACING CO-PROCESSORS AND INPUT/OUTPUT DEVICES VIA A MAIN MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/303048 [patent_app_country] => US [patent_app_date] => 2011-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 12718 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13303048 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9472484 [patent_doc_number] => 08726132 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-13 [patent_title] => 'Checksum verification accelerator' [patent_app_type] => utility [patent_app_number] => 13/302688 [patent_app_country] => US [patent_app_date] => 2011-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2539 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13302688 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9404801 [patent_doc_number] => 08694865 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-08 [patent_title] => 'Data storage device configured to reduce buffer traffic and related method of operation' [patent_app_type] => utility [patent_app_number] => 13/301025 [patent_app_country] => US [patent_app_date] => 2011-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 43 [patent_no_of_words] => 10698 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13301025 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9486591 [patent_doc_number] => 08732554 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-20 [patent_title] => 'Data storage device and method for checking and correcting errors' [patent_app_type] => utility [patent_app_number] => 13/301649 [patent_app_country] => US [patent_app_date] => 2011-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4225 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13301649 [rel_patent_id] =>[rel_patent_doc_number] =>)