Search

Mang Hang Yeung

Examiner (ID: 1315, Phone: (571)270-7319 , Office: P/2463 )

Most Active Art Unit
2463
Art Unit(s)
2416, 2463
Total Applications
761
Issued Applications
610
Pending Applications
64
Abandoned Applications
87

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17677789 [patent_doc_number] => 20220190956 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => Packet Processing Method and Apparatus, and Chip [patent_app_type] => utility [patent_app_number] => 17/684729 [patent_app_country] => US [patent_app_date] => 2022-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16291 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17684729 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/684729
Packet processing method and apparatus, and chip Mar 1, 2022 Issued
Array ( [id] => 18440960 [patent_doc_number] => 20230188256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => METHOD FOR ERROR HANDLING OF AN INTERCONNECTION PROTOCOL, CONTROLLER, AND STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/684080 [patent_app_country] => US [patent_app_date] => 2022-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10454 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17684080 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/684080
Method for error handling of an interconnection protocol, controller, and storage device Feb 28, 2022 Issued
Array ( [id] => 18263645 [patent_doc_number] => 11611356 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-21 [patent_title] => Method and apparatus for low density parity check channel coding in wireless communication system [patent_app_type] => utility [patent_app_number] => 17/684144 [patent_app_country] => US [patent_app_date] => 2022-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 18860 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 315 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17684144 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/684144
Method and apparatus for low density parity check channel coding in wireless communication system Feb 28, 2022 Issued
Array ( [id] => 18507390 [patent_doc_number] => 11705215 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-18 [patent_title] => Memory sub-system with background scan and histogram statistics [patent_app_type] => utility [patent_app_number] => 17/681644 [patent_app_country] => US [patent_app_date] => 2022-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 14547 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17681644 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/681644
Memory sub-system with background scan and histogram statistics Feb 24, 2022 Issued
Array ( [id] => 17661715 [patent_doc_number] => 20220182180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => Packet Processing Method and Apparatus, and Computer Storage Medium [patent_app_type] => utility [patent_app_number] => 17/679758 [patent_app_country] => US [patent_app_date] => 2022-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12041 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17679758 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/679758
Packet processing method and apparatus, and computer storage medium Feb 23, 2022 Issued
Array ( [id] => 17794650 [patent_doc_number] => 20220253742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => QUANTUM ERROR CORRECTION DECODING SYSTEM AND METHOD, FAULT-TOLERANT QUANTUM ERROR CORRECTION SYSTEM, AND CHIP [patent_app_type] => utility [patent_app_number] => 17/666226 [patent_app_country] => US [patent_app_date] => 2022-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17530 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17666226 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/666226
Quantum error correction decoding system and method, fault-tolerant quantum error correction system, and chip Feb 6, 2022 Issued
Array ( [id] => 17613702 [patent_doc_number] => 20220155982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => AUTOMATIC MEMORY OVERCLOCKING [patent_app_type] => utility [patent_app_number] => 17/591924 [patent_app_country] => US [patent_app_date] => 2022-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4918 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17591924 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/591924
Automatic memory overclocking Feb 2, 2022 Issued
Array ( [id] => 18624504 [patent_doc_number] => 11757567 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Devices and methods for encoding and decoding to implement a maximum transition avoidance coding with minimum overhead [patent_app_type] => utility [patent_app_number] => 17/590474 [patent_app_country] => US [patent_app_date] => 2022-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 10383 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17590474 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/590474
Devices and methods for encoding and decoding to implement a maximum transition avoidance coding with minimum overhead Jan 31, 2022 Issued
Array ( [id] => 18804952 [patent_doc_number] => 11838122 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Code block segmentation and configuration for concatenated turbo and RS coding [patent_app_type] => utility [patent_app_number] => 17/582976 [patent_app_country] => US [patent_app_date] => 2022-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8897 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17582976 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/582976
Code block segmentation and configuration for concatenated turbo and RS coding Jan 23, 2022 Issued
Array ( [id] => 18174143 [patent_doc_number] => 11573855 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => Object format resilient to remote object store errors [patent_app_type] => utility [patent_app_number] => 17/582221 [patent_app_country] => US [patent_app_date] => 2022-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9308 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17582221 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/582221
Object format resilient to remote object store errors Jan 23, 2022 Issued
Array ( [id] => 18515360 [patent_doc_number] => 20230231649 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-20 [patent_title] => BIT-CHANNEL COMBINER AND COMBINED PROBABILISTIC CONSTELLATION SHAPING AND POLAR ENCODER [patent_app_type] => utility [patent_app_number] => 17/576123 [patent_app_country] => US [patent_app_date] => 2022-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4377 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17576123 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/576123
Bit-channel combiner and combined probabilistic constellation shaping and polar encoder Jan 13, 2022 Issued
Array ( [id] => 18489255 [patent_doc_number] => 20230216606 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => HIERARCHICAL CODING SCHEME [patent_app_type] => utility [patent_app_number] => 17/647268 [patent_app_country] => US [patent_app_date] => 2022-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15305 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17647268 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/647268
Hierarchical coding scheme Jan 5, 2022 Issued
Array ( [id] => 18508154 [patent_doc_number] => 11705986 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-18 [patent_title] => Hardware based cyclic redundancy check (CRC) re-calculator for timestamped frames over a data bus [patent_app_type] => utility [patent_app_number] => 17/566305 [patent_app_country] => US [patent_app_date] => 2021-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 10385 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17566305 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/566305
Hardware based cyclic redundancy check (CRC) re-calculator for timestamped frames over a data bus Dec 29, 2021 Issued
Array ( [id] => 17683982 [patent_doc_number] => 11368250 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-06-21 [patent_title] => Adaptive payload extraction and retransmission in wireless data communications with error aggregations [patent_app_type] => utility [patent_app_number] => 17/555146 [patent_app_country] => US [patent_app_date] => 2021-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5660 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17555146 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/555146
Adaptive payload extraction and retransmission in wireless data communications with error aggregations Dec 16, 2021 Issued
Array ( [id] => 18966450 [patent_doc_number] => 11900221 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-02-13 [patent_title] => Error correction decoding techniques for lattice surgery [patent_app_type] => utility [patent_app_number] => 17/545895 [patent_app_country] => US [patent_app_date] => 2021-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 45 [patent_no_of_words] => 14964 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17545895 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/545895
Error correction decoding techniques for lattice surgery Dec 7, 2021 Issued
Array ( [id] => 18890077 [patent_doc_number] => 11868850 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Preventing quantum errors using a quantum error correction algorithm trainer (QECAT) table [patent_app_type] => utility [patent_app_number] => 17/536906 [patent_app_country] => US [patent_app_date] => 2021-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6038 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17536906 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/536906
Preventing quantum errors using a quantum error correction algorithm trainer (QECAT) table Nov 28, 2021 Issued
Array ( [id] => 17449439 [patent_doc_number] => 20220069944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => Data Processing Method And Related Apparatus [patent_app_type] => utility [patent_app_number] => 17/521659 [patent_app_country] => US [patent_app_date] => 2021-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10681 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17521659 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/521659
Data processing method and related apparatus Nov 7, 2021 Issued
Array ( [id] => 18220194 [patent_doc_number] => 11595152 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-02-28 [patent_title] => Forward error correction encoding using binary clustering [patent_app_type] => utility [patent_app_number] => 17/519458 [patent_app_country] => US [patent_app_date] => 2021-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 16135 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17519458 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/519458
Forward error correction encoding using binary clustering Nov 3, 2021 Issued
Array ( [id] => 18279664 [patent_doc_number] => 20230095136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => WIRELESS COMMUNICATION SYSTEM AND WIRELESS COMMUNICATION METHOD [patent_app_type] => utility [patent_app_number] => 17/453483 [patent_app_country] => US [patent_app_date] => 2021-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6137 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17453483 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/453483
Wireless communication system and wireless communication method Nov 2, 2021 Issued
Array ( [id] => 18646051 [patent_doc_number] => 11770134 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-26 [patent_title] => Methods and apparatus for CRC concatenated polar encoding [patent_app_type] => utility [patent_app_number] => 17/512289 [patent_app_country] => US [patent_app_date] => 2021-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 13293 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17512289 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/512289
Methods and apparatus for CRC concatenated polar encoding Oct 26, 2021 Issued
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