Mang Hang Yeung
Examiner (ID: 1315, Phone: (571)270-7319 , Office: P/2463 )
Most Active Art Unit | 2463 |
Art Unit(s) | 2416, 2463 |
Total Applications | 761 |
Issued Applications | 610 |
Pending Applications | 64 |
Abandoned Applications | 87 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
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[id] => 4449053
[patent_doc_number] => 07865805
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[patent_issue_date] => 2011-01-04
[patent_title] => 'Multiple bit upset insensitive error detection and correction circuit for field programmable gate array based on static random access memory blocks'
[patent_app_type] => utility
[patent_app_number] => 11/710437
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/710437 | Multiple bit upset insensitive error detection and correction circuit for field programmable gate array based on static random access memory blocks | Feb 25, 2007 | Issued |
Array
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[patent_issue_date] => 2011-05-10
[patent_title] => 'Apparatus and method for receiving signal in communication system'
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Array
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[patent_issue_date] => 2010-11-23
[patent_title] => 'Power savings for memory with error correction mode'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/676774 | Power savings for memory with error correction mode | Feb 19, 2007 | Issued |
Array
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[patent_title] => 'Apparatus and method for transmitting/receiving signal in a communication system'
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Array
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[patent_title] => 'Semiconductor memory device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/674342 | Semiconductor memory device | Feb 12, 2007 | Issued |
Array
(
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[patent_title] => 'Parallel inversionless error and erasure processing'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/706068 | Parallel inversionless error and erasure processing | Feb 11, 2007 | Issued |
Array
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[id] => 4815269
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[patent_title] => 'Flash memory system and method for controlling the same'
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[firstpage_image] =>[orig_patent_app_number] => 11704986
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/704986 | Flash memory system and method for controlling the same | Feb 11, 2007 | Issued |
Array
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[id] => 5017619
[patent_doc_number] => 20070260828
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[patent_issue_date] => 2007-11-08
[patent_title] => 'Method and Apparatus for Scrubbing Memory'
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[patent_app_number] => 11/673432
[patent_app_country] => US
[patent_app_date] => 2007-02-09
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/673432 | Method and apparatus for scrubbing memory | Feb 8, 2007 | Issued |
Array
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[id] => 4499321
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[patent_title] => 'Apparatus for pipelined cyclic redundancy check circuit with multiple intermediate outputs'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/673086 | Apparatus for pipelined cyclic redundancy check circuit with multiple intermediate outputs | Feb 8, 2007 | Issued |
Array
(
[id] => 4487249
[patent_doc_number] => 07870473
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[patent_issue_date] => 2011-01-11
[patent_title] => 'Error detection device for an address decoder, and device for error detection for an address decoder'
[patent_app_type] => utility
[patent_app_number] => 11/672638
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/672638 | Error detection device for an address decoder, and device for error detection for an address decoder | Feb 7, 2007 | Issued |
Array
(
[id] => 4550316
[patent_doc_number] => 07925965
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[patent_title] => 'Method for transmitting/receiving signals in a communications system and an apparatus therefor'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/702005 | Method for transmitting/receiving signals in a communications system and an apparatus therefor | Feb 1, 2007 | Issued |
Array
(
[id] => 4527980
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[patent_title] => 'Message remapping and encoding'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/670327 | Message remapping and encoding | Jan 31, 2007 | Issued |
Array
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[id] => 4934875
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Array
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Array
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[patent_title] => 'METHOD AND APPARATUS FOR MEMORY OPTIMIZATION IN MPE-FEC SYSTEM'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/623617 | Method and apparatus for memory optimization in MPE-FEC system | Jan 15, 2007 | Issued |
Array
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[patent_title] => 'DECODER AND METHOD FOR DECODING A TAIL-BITING CONVOLUTIONAL ENCODED SIGNAL USING VITERBI DECODING SCHEME'
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/617251 | Efficient CTC encoders and methods | Dec 27, 2006 | Issued |