Search

Mang Hang Yeung

Examiner (ID: 1315, Phone: (571)270-7319 , Office: P/2463 )

Most Active Art Unit
2463
Art Unit(s)
2416, 2463
Total Applications
761
Issued Applications
610
Pending Applications
64
Abandoned Applications
87

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5615310 [patent_doc_number] => 20060117239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-01 [patent_title] => 'METHOD AND RELATED APPARATUS FOR PERFORMING ERROR CHECKING-CORRECTING' [patent_app_type] => utility [patent_app_number] => 10/908555 [patent_app_country] => US [patent_app_date] => 2005-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3025 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20060117239.pdf [firstpage_image] =>[orig_patent_app_number] => 10908555 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/908555
Method and related apparatus for performing error checking-correcting May 16, 2005 Issued
Array ( [id] => 9311 [patent_doc_number] => 07814402 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-12 [patent_title] => 'Method and apparatus for digit-serial communications for iterative digital processing algorithms' [patent_app_type] => utility [patent_app_number] => 11/569017 [patent_app_country] => US [patent_app_date] => 2005-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6975 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/814/07814402.pdf [firstpage_image] =>[orig_patent_app_number] => 11569017 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/569017
Method and apparatus for digit-serial communications for iterative digital processing algorithms May 12, 2005 Issued
Array ( [id] => 868999 [patent_doc_number] => 07370261 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-06 [patent_title] => 'Convolution-encoded raid with trellis-decode-rebuild' [patent_app_type] => utility [patent_app_number] => 11/125288 [patent_app_country] => US [patent_app_date] => 2005-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11865 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/370/07370261.pdf [firstpage_image] =>[orig_patent_app_number] => 11125288 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/125288
Convolution-encoded raid with trellis-decode-rebuild May 8, 2005 Issued
Array ( [id] => 7241570 [patent_doc_number] => 20050257106 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-17 [patent_title] => 'File download and streaming system' [patent_app_type] => utility [patent_app_number] => 11/125818 [patent_app_country] => US [patent_app_date] => 2005-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 27728 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0257/20050257106.pdf [firstpage_image] =>[orig_patent_app_number] => 11125818 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/125818
File download and streaming system May 8, 2005 Issued
Array ( [id] => 7208784 [patent_doc_number] => 20050258985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-24 [patent_title] => 'SISO decoder' [patent_app_type] => utility [patent_app_number] => 11/123672 [patent_app_country] => US [patent_app_date] => 2005-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8121 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20050258985.pdf [firstpage_image] =>[orig_patent_app_number] => 11123672 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/123672
SISO decoder May 5, 2005 Issued
Array ( [id] => 7255859 [patent_doc_number] => 20050273689 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-08 [patent_title] => 'Method for data transmission' [patent_app_type] => utility [patent_app_number] => 11/120616 [patent_app_country] => US [patent_app_date] => 2005-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2253 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0273/20050273689.pdf [firstpage_image] =>[orig_patent_app_number] => 11120616 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/120616
Method for data transmission May 2, 2005 Issued
Array ( [id] => 801710 [patent_doc_number] => 07426684 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-09-16 [patent_title] => 'Lost-cycle measurement using cycle counter' [patent_app_type] => utility [patent_app_number] => 11/118929 [patent_app_country] => US [patent_app_date] => 2005-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5963 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/426/07426684.pdf [firstpage_image] =>[orig_patent_app_number] => 11118929 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/118929
Lost-cycle measurement using cycle counter Apr 28, 2005 Issued
Array ( [id] => 5836600 [patent_doc_number] => 20060248432 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-02 [patent_title] => 'Method and apparatus for implementing processor bus speculative data completion' [patent_app_type] => utility [patent_app_number] => 11/116624 [patent_app_country] => US [patent_app_date] => 2005-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1983 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0248/20060248432.pdf [firstpage_image] =>[orig_patent_app_number] => 11116624 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/116624
Method for implementing processor bus speculative data completion Apr 27, 2005 Issued
Array ( [id] => 5836602 [patent_doc_number] => 20060248434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-02 [patent_title] => 'Non-systematic coded error correction' [patent_app_type] => utility [patent_app_number] => 11/116560 [patent_app_country] => US [patent_app_date] => 2005-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7528 [patent_no_of_claims] => 83 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0248/20060248434.pdf [firstpage_image] =>[orig_patent_app_number] => 11116560 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/116560
Non-systematic coded error correction Apr 27, 2005 Issued
Array ( [id] => 5087025 [patent_doc_number] => 20070277076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-29 [patent_title] => 'Semiconductor Memory Device' [patent_app_type] => utility [patent_app_number] => 11/568470 [patent_app_country] => US [patent_app_date] => 2005-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3362 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0277/20070277076.pdf [firstpage_image] =>[orig_patent_app_number] => 11568470 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/568470
Semiconductor memory device Apr 24, 2005 Issued
Array ( [id] => 860511 [patent_doc_number] => 07376886 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-20 [patent_title] => 'Method and related apparatus for data error checking' [patent_app_type] => utility [patent_app_number] => 10/907888 [patent_app_country] => US [patent_app_date] => 2005-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5645 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/376/07376886.pdf [firstpage_image] =>[orig_patent_app_number] => 10907888 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/907888
Method and related apparatus for data error checking Apr 18, 2005 Issued
Array ( [id] => 885821 [patent_doc_number] => 07356742 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-08 [patent_title] => 'Method and apparatus for testing a memory device in quasi-operating conditions' [patent_app_type] => utility [patent_app_number] => 11/107896 [patent_app_country] => US [patent_app_date] => 2005-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 27 [patent_no_of_words] => 12892 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/356/07356742.pdf [firstpage_image] =>[orig_patent_app_number] => 11107896 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/107896
Method and apparatus for testing a memory device in quasi-operating conditions Apr 17, 2005 Issued
Array ( [id] => 6953982 [patent_doc_number] => 20050229077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-13 [patent_title] => 'Semiconductor storage device' [patent_app_type] => utility [patent_app_number] => 11/102797 [patent_app_country] => US [patent_app_date] => 2005-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5727 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0229/20050229077.pdf [firstpage_image] =>[orig_patent_app_number] => 11102797 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/102797
Semiconductor storage device Apr 10, 2005 Issued
Array ( [id] => 4586123 [patent_doc_number] => 07856590 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-21 [patent_title] => 'Digital television transmitter and receiver for using 16 state trellis coding' [patent_app_type] => utility [patent_app_number] => 10/594464 [patent_app_country] => US [patent_app_date] => 2005-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9074 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/856/07856590.pdf [firstpage_image] =>[orig_patent_app_number] => 10594464 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/594464
Digital television transmitter and receiver for using 16 state trellis coding Mar 31, 2005 Issued
Array ( [id] => 329678 [patent_doc_number] => 07516394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-07 [patent_title] => 'Method and apparatus for combined encoder/syndrome computer with programmable parity level' [patent_app_type] => utility [patent_app_number] => 11/079634 [patent_app_country] => US [patent_app_date] => 2005-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 5158 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/516/07516394.pdf [firstpage_image] =>[orig_patent_app_number] => 11079634 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/079634
Method and apparatus for combined encoder/syndrome computer with programmable parity level Mar 13, 2005 Issued
Array ( [id] => 905124 [patent_doc_number] => 07340669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-04 [patent_title] => 'Memory efficient streamlined transmitter with a multiple instance hybrid ARQ' [patent_app_type] => utility [patent_app_number] => 11/078751 [patent_app_country] => US [patent_app_date] => 2005-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2254 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/340/07340669.pdf [firstpage_image] =>[orig_patent_app_number] => 11078751 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/078751
Memory efficient streamlined transmitter with a multiple instance hybrid ARQ Mar 10, 2005 Issued
Array ( [id] => 7038390 [patent_doc_number] => 20050157824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-21 [patent_title] => 'Decoding apparatus, decoding method, data-receiving apparatus and data-receiving method' [patent_app_type] => utility [patent_app_number] => 11/077064 [patent_app_country] => US [patent_app_date] => 2005-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7292 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20050157824.pdf [firstpage_image] =>[orig_patent_app_number] => 11077064 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/077064
Decoding apparatus, decoding method, data-receiving apparatus and data-receiving method Mar 9, 2005 Issued
Array ( [id] => 6968311 [patent_doc_number] => 20050235179 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-20 [patent_title] => 'Device for protection against error injection into a synchronous flip-flop of an elementary logic module' [patent_app_type] => utility [patent_app_number] => 11/070838 [patent_app_country] => US [patent_app_date] => 2005-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8799 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20050235179.pdf [firstpage_image] =>[orig_patent_app_number] => 11070838 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/070838
Device for protection against error injection into a synchronous flip-flop of an elementary logic module Mar 1, 2005 Issued
Array ( [id] => 5621262 [patent_doc_number] => 20060190797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-24 [patent_title] => 'Low complexity decoding of low density parity check codes' [patent_app_type] => utility [patent_app_number] => 11/064767 [patent_app_country] => US [patent_app_date] => 2005-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6078 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20060190797.pdf [firstpage_image] =>[orig_patent_app_number] => 11064767 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/064767
Low complexity decoding of low density parity check codes Feb 23, 2005 Issued
Array ( [id] => 5592371 [patent_doc_number] => 20060041824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-23 [patent_title] => 'METHOD AND APPARATUS FOR COMPUTING PARITY CHARACTERS FOR A CODEWORD OF A CYCLIC CODE' [patent_app_type] => utility [patent_app_number] => 10/906574 [patent_app_country] => US [patent_app_date] => 2005-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4620 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20060041824.pdf [firstpage_image] =>[orig_patent_app_number] => 10906574 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/906574
Method and apparatus for computing parity characters for a codeword of a cyclic code Feb 23, 2005 Issued
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