Search

Mang Hang Yeung

Examiner (ID: 1315, Phone: (571)270-7319 , Office: P/2463 )

Most Active Art Unit
2463
Art Unit(s)
2416, 2463
Total Applications
761
Issued Applications
610
Pending Applications
64
Abandoned Applications
87

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 615887 [patent_doc_number] => 07149937 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-12 [patent_title] => 'Information processing method and system with execution thresholds allowable to input data errors' [patent_app_type] => utility [patent_app_number] => 10/345266 [patent_app_country] => US [patent_app_date] => 2003-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 6919 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/149/07149937.pdf [firstpage_image] =>[orig_patent_app_number] => 10345266 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/345266
Information processing method and system with execution thresholds allowable to input data errors Jan 15, 2003 Issued
Array ( [id] => 684950 [patent_doc_number] => 07085982 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-01 [patent_title] => 'Pulse generation circuit and semiconductor tester that uses the pulse generation circuit' [patent_app_type] => utility [patent_app_number] => 10/345230 [patent_app_country] => US [patent_app_date] => 2003-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 30 [patent_no_of_words] => 10494 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/085/07085982.pdf [firstpage_image] =>[orig_patent_app_number] => 10345230 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/345230
Pulse generation circuit and semiconductor tester that uses the pulse generation circuit Jan 15, 2003 Issued
10/346394 Method and apparatus for forward error correction Jan 14, 2003 Abandoned
Array ( [id] => 6698234 [patent_doc_number] => 20030110428 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'Semiconductor integrated circuit having compression circuitry for compressing test data, and the test system and method for utilizing the semiconductor integrated circuit' [patent_app_type] => new [patent_app_number] => 10/342651 [patent_app_country] => US [patent_app_date] => 2003-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3051 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20030110428.pdf [firstpage_image] =>[orig_patent_app_number] => 10342651 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/342651
Semiconductor integrated circuit having compression circuitry for compressing test data, and the test system for utilizing the semiconductor integrated circuit Jan 13, 2003 Issued
Array ( [id] => 782399 [patent_doc_number] => 06996763 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-07 [patent_title] => 'Operation of a forward link acknowledgement channel for the reverse link data' [patent_app_type] => utility [patent_app_number] => 10/341329 [patent_app_country] => US [patent_app_date] => 2003-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7629 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/996/06996763.pdf [firstpage_image] =>[orig_patent_app_number] => 10341329 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/341329
Operation of a forward link acknowledgement channel for the reverse link data Jan 9, 2003 Issued
Array ( [id] => 1125048 [patent_doc_number] => 06799295 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-28 [patent_title] => 'High speed turbo codes decoder for 3G using pipelined SISO log-map decoders architecture' [patent_app_type] => B2 [patent_app_number] => 10/248245 [patent_app_country] => US [patent_app_date] => 2002-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 26 [patent_no_of_words] => 5469 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/799/06799295.pdf [firstpage_image] =>[orig_patent_app_number] => 10248245 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/248245
High speed turbo codes decoder for 3G using pipelined SISO log-map decoders architecture Dec 29, 2002 Issued
Array ( [id] => 7123863 [patent_doc_number] => 20050015692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-20 [patent_title] => 'Adjustable voltage boundary scan adapter for emulation and test' [patent_app_type] => utility [patent_app_number] => 10/325337 [patent_app_country] => US [patent_app_date] => 2002-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4931 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20050015692.pdf [firstpage_image] =>[orig_patent_app_number] => 10325337 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/325337
Adjustable voltage boundary scan adapter for emulation and test Dec 19, 2002 Abandoned
Array ( [id] => 731681 [patent_doc_number] => 07047458 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-16 [patent_title] => 'Testing methodology and apparatus for interconnects' [patent_app_type] => utility [patent_app_number] => 10/319517 [patent_app_country] => US [patent_app_date] => 2002-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6088 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/047/07047458.pdf [firstpage_image] =>[orig_patent_app_number] => 10319517 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/319517
Testing methodology and apparatus for interconnects Dec 15, 2002 Issued
Array ( [id] => 7309404 [patent_doc_number] => 20040117692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-17 [patent_title] => 'High speed capture and averaging of serial data by asynchronous periodic sampling' [patent_app_type] => new [patent_app_number] => 10/319116 [patent_app_country] => US [patent_app_date] => 2002-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3295 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20040117692.pdf [firstpage_image] =>[orig_patent_app_number] => 10319116 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/319116
High speed capture and averaging of serial data by asynchronous periodic sampling Dec 12, 2002 Issued
Array ( [id] => 7309525 [patent_doc_number] => 20040117721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-17 [patent_title] => 'Pipelined add-compare-select circuits and methods, and applications thereof' [patent_app_type] => new [patent_app_number] => 10/318250 [patent_app_country] => US [patent_app_date] => 2002-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 8558 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20040117721.pdf [firstpage_image] =>[orig_patent_app_number] => 10318250 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/318250
Pipelined add-compare-select circuits and methods, and applications thereof Dec 12, 2002 Issued
Array ( [id] => 400701 [patent_doc_number] => 07296213 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-13 [patent_title] => 'Error correction cache for flash memory' [patent_app_type] => utility [patent_app_number] => 10/316401 [patent_app_country] => US [patent_app_date] => 2002-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7888 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/296/07296213.pdf [firstpage_image] =>[orig_patent_app_number] => 10316401 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/316401
Error correction cache for flash memory Dec 10, 2002 Issued
Array ( [id] => 478597 [patent_doc_number] => 07231585 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-12 [patent_title] => 'Error correction for flash memory' [patent_app_type] => utility [patent_app_number] => 10/316462 [patent_app_country] => US [patent_app_date] => 2002-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7710 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/231/07231585.pdf [firstpage_image] =>[orig_patent_app_number] => 10316462 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/316462
Error correction for flash memory Dec 10, 2002 Issued
Array ( [id] => 789518 [patent_doc_number] => 06988234 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-17 [patent_title] => 'Apparatus and method for memory sharing between interleaver and deinterleaver in a turbo decoder' [patent_app_type] => utility [patent_app_number] => 10/314724 [patent_app_country] => US [patent_app_date] => 2002-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4690 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/988/06988234.pdf [firstpage_image] =>[orig_patent_app_number] => 10314724 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/314724
Apparatus and method for memory sharing between interleaver and deinterleaver in a turbo decoder Dec 8, 2002 Issued
Array ( [id] => 749657 [patent_doc_number] => 07032155 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-18 [patent_title] => 'Data regenerating apparatus' [patent_app_type] => utility [patent_app_number] => 10/309980 [patent_app_country] => US [patent_app_date] => 2002-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 10098 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/032/07032155.pdf [firstpage_image] =>[orig_patent_app_number] => 10309980 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/309980
Data regenerating apparatus Dec 3, 2002 Issued
Array ( [id] => 6655676 [patent_doc_number] => 20030105991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'Method for testing functional circuit block' [patent_app_type] => new [patent_app_number] => 10/307401 [patent_app_country] => US [patent_app_date] => 2002-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6525 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20030105991.pdf [firstpage_image] =>[orig_patent_app_number] => 10307401 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/307401
Method for testing functional circuit block Dec 1, 2002 Issued
Array ( [id] => 726466 [patent_doc_number] => 07051267 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-23 [patent_title] => 'Efficient high-speed Reed-Solomon decoder' [patent_app_type] => utility [patent_app_number] => 10/305091 [patent_app_country] => US [patent_app_date] => 2002-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 3778 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/051/07051267.pdf [firstpage_image] =>[orig_patent_app_number] => 10305091 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/305091
Efficient high-speed Reed-Solomon decoder Nov 25, 2002 Issued
Array ( [id] => 771601 [patent_doc_number] => 07010739 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-03-07 [patent_title] => 'Error evaluator for inversionless Berlekamp-Massey algorithm in Reed-Solomon decoders' [patent_app_type] => utility [patent_app_number] => 10/304511 [patent_app_country] => US [patent_app_date] => 2002-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4169 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/010/07010739.pdf [firstpage_image] =>[orig_patent_app_number] => 10304511 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/304511
Error evaluator for inversionless Berlekamp-Massey algorithm in Reed-Solomon decoders Nov 25, 2002 Issued
Array ( [id] => 739911 [patent_doc_number] => 07039853 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-02 [patent_title] => 'Multi-mode Reed-Solomon decoder based upon the PGZ algorithm and associated method' [patent_app_type] => utility [patent_app_number] => 10/302825 [patent_app_country] => US [patent_app_date] => 2002-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 3991 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/039/07039853.pdf [firstpage_image] =>[orig_patent_app_number] => 10302825 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/302825
Multi-mode Reed-Solomon decoder based upon the PGZ algorithm and associated method Nov 24, 2002 Issued
Array ( [id] => 508693 [patent_doc_number] => 07210076 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-24 [patent_title] => 'Interleaving order generator, interleaver, turbo encoder, and turbo decoder' [patent_app_type] => utility [patent_app_number] => 10/496110 [patent_app_country] => US [patent_app_date] => 2002-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 10177 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/210/07210076.pdf [firstpage_image] =>[orig_patent_app_number] => 10496110 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/496110
Interleaving order generator, interleaver, turbo encoder, and turbo decoder Nov 18, 2002 Issued
Array ( [id] => 478595 [patent_doc_number] => 07231584 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-12 [patent_title] => 'Method for error correction in packet-oriented data transmission with transmission blocks that are better determined by descriptors' [patent_app_type] => utility [patent_app_number] => 10/496343 [patent_app_country] => US [patent_app_date] => 2002-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2068 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/231/07231584.pdf [firstpage_image] =>[orig_patent_app_number] => 10496343 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/496343
Method for error correction in packet-oriented data transmission with transmission blocks that are better determined by descriptors Nov 17, 2002 Issued
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