Mang Hang Yeung
Examiner (ID: 1315, Phone: (571)270-7319 , Office: P/2463 )
Most Active Art Unit | 2463 |
Art Unit(s) | 2416, 2463 |
Total Applications | 761 |
Issued Applications | 610 |
Pending Applications | 64 |
Abandoned Applications | 87 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 1481377
[patent_doc_number] => 06389572
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-05-14
[patent_title] => 'Method of extracting bits from modulated waveforms'
[patent_app_type] => B1
[patent_app_number] => 09/322635
[patent_app_country] => US
[patent_app_date] => 1999-05-28
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/389/06389572.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/322635 | Method of extracting bits from modulated waveforms | May 27, 1999 | Issued |
Array
(
[id] => 4310962
[patent_doc_number] => 06212657
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-04-03
[patent_title] => 'System and process for delivering digital data on demand'
[patent_app_type] => 1
[patent_app_number] => 9/318524
[patent_app_country] => US
[patent_app_date] => 1999-05-25
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/318524 | System and process for delivering digital data on demand | May 24, 1999 | Issued |
Array
(
[id] => 7638556
[patent_doc_number] => 06397365
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-05-28
[patent_title] => 'Memory error correction using redundant sliced memory and standard ECC mechanisms'
[patent_app_type] => B1
[patent_app_number] => 09/313849
[patent_app_country] => US
[patent_app_date] => 1999-05-18
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/313849 | Memory error correction using redundant sliced memory and standard ECC mechanisms | May 17, 1999 | Issued |
Array
(
[id] => 4350440
[patent_doc_number] => 06321356
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-11-20
[patent_title] => 'Programmable pattern generator'
[patent_app_type] => 1
[patent_app_number] => 9/314046
[patent_app_country] => US
[patent_app_date] => 1999-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[pdf_file] => patents/06/321/06321356.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/314046 | Programmable pattern generator | May 17, 1999 | Issued |
Array
(
[id] => 1438769
[patent_doc_number] => 06357027
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-03-12
[patent_title] => 'On chip data comparator with variable data and compare result compression'
[patent_app_type] => B1
[patent_app_number] => 09/313016
[patent_app_country] => US
[patent_app_date] => 1999-05-17
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 09313016
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/313016 | On chip data comparator with variable data and compare result compression | May 16, 1999 | Issued |
Array
(
[id] => 1481361
[patent_doc_number] => 06389569
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-05-14
[patent_title] => 'Recording medium for storing real time recording/reproduction information, method and apparatus for recording and reproducing in real time, and file operating method using the same'
[patent_app_type] => B1
[patent_app_number] => 09/304279
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/304279 | Recording medium for storing real time recording/reproduction information, method and apparatus for recording and reproducing in real time, and file operating method using the same | May 2, 1999 | Issued |
Array
(
[id] => 4371816
[patent_doc_number] => 06216251
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[patent_kind] => NA
[patent_issue_date] => 2001-04-10
[patent_title] => 'On-chip error detection and correction system for an embedded non-volatile memory array and method of operation'
[patent_app_type] => 1
[patent_app_number] => 9/302505
[patent_app_country] => US
[patent_app_date] => 1999-04-30
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[pdf_file] => patents/06/216/06216251.pdf
[firstpage_image] =>[orig_patent_app_number] => 302505
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/302505 | On-chip error detection and correction system for an embedded non-volatile memory array and method of operation | Apr 29, 1999 | Issued |
Array
(
[id] => 1501726
[patent_doc_number] => 06405334
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-06-11
[patent_title] => 'Method and apparatus characterizing AC parameters of a field programmable gate array internal cell array'
[patent_app_type] => B1
[patent_app_number] => 09/301358
[patent_app_country] => US
[patent_app_date] => 1999-04-29
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[firstpage_image] =>[orig_patent_app_number] => 09301358
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/301358 | Method and apparatus characterizing AC parameters of a field programmable gate array internal cell array | Apr 28, 1999 | Issued |
Array
(
[id] => 4310989
[patent_doc_number] => 06212659
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-04-03
[patent_title] => 'Method and apparatus for providing error protection for over the air file transfer'
[patent_app_type] => 1
[patent_app_number] => 9/287411
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[patent_app_date] => 1999-04-07
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[firstpage_image] =>[orig_patent_app_number] => 287411
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/287411 | Method and apparatus for providing error protection for over the air file transfer | Apr 6, 1999 | Issued |
Array
(
[id] => 1513475
[patent_doc_number] => 06442724
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-08-27
[patent_title] => 'Failure capture apparatus and method for automatic test equipment'
[patent_app_type] => B1
[patent_app_number] => 09/285857
[patent_app_country] => US
[patent_app_date] => 1999-04-02
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/285857 | Failure capture apparatus and method for automatic test equipment | Apr 1, 1999 | Issued |
Array
(
[id] => 1526589
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[patent_title] => 'Iterative demapping'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/285580 | Iterative demapping | Apr 1, 1999 | Issued |
Array
(
[id] => 1540220
[patent_doc_number] => 06338155
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[patent_issue_date] => 2002-01-08
[patent_title] => 'Data generation method and apparatus'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/285457 | Data generation method and apparatus | Apr 1, 1999 | Issued |
Array
(
[id] => 1497939
[patent_doc_number] => 06343367
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[patent_title] => 'Error correction system for five or more errors'
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Array
(
[id] => 4325142
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[patent_issue_date] => 2001-12-04
[patent_title] => 'Wafer burn-in design for DRAM and FeRAM devices'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/274001 | Wafer burn-in design for DRAM and FeRAM devices | Mar 21, 1999 | Issued |
Array
(
[id] => 1431588
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[patent_title] => 'Communication systems, circuits, circuit systems and methods of operating a circuit'
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Array
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[patent_title] => 'Disk device and data error correction method thereof'
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Array
(
[id] => 1573869
[patent_doc_number] => 06499122
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[patent_title] => 'Adjustable voltage boundary scan adapter for emulation and test'
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Array
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Array
(
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/252573 | Hierarchical access of test access ports in embedded core integrated circuits | Feb 17, 1999 | Issued |