Search

Marc E. Norman

Examiner (ID: 1733, Phone: (571)272-4812 , Office: P/3744 )

Most Active Art Unit
3744
Art Unit(s)
3763, 2163, 3744
Total Applications
2778
Issued Applications
2253
Pending Applications
239
Abandoned Applications
307

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6175571 [patent_doc_number] => 20020155413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-24 [patent_title] => 'Flight simulator adapted for a family of aircraft' [patent_app_type] => new [patent_app_number] => 10/126975 [patent_app_country] => US [patent_app_date] => 2002-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2388 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20020155413.pdf [firstpage_image] =>[orig_patent_app_number] => 10126975 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/126975
Flight simulator adapted for a family of aircraft Apr 21, 2002 Issued
10/019059 Logic event simulation Apr 18, 2002 Abandoned
Array ( [id] => 6480483 [patent_doc_number] => 20020152061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-17 [patent_title] => 'Data processing system and design system' [patent_app_type] => new [patent_app_number] => 10/109650 [patent_app_country] => US [patent_app_date] => 2002-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 13418 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20020152061.pdf [firstpage_image] =>[orig_patent_app_number] => 10109650 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/109650
Data processing system and design system Mar 31, 2002 Abandoned
Array ( [id] => 6654117 [patent_doc_number] => 20030105617 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'Hardware acceleration system for logic simulation' [patent_app_type] => new [patent_app_number] => 10/102749 [patent_app_country] => US [patent_app_date] => 2002-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 12317 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20030105617.pdf [firstpage_image] =>[orig_patent_app_number] => 10102749 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/102749
Hardware acceleration system for logic simulation Mar 21, 2002 Abandoned
Array ( [id] => 6831582 [patent_doc_number] => 20030182640 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-25 [patent_title] => 'Signal integrity analysis system' [patent_app_type] => new [patent_app_number] => 10/103508 [patent_app_country] => US [patent_app_date] => 2002-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3113 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20030182640.pdf [firstpage_image] =>[orig_patent_app_number] => 10103508 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/103508
Signal integrity analysis system Mar 19, 2002 Abandoned
Array ( [id] => 7106190 [patent_doc_number] => 20050107997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'System and method for resource usage estimation' [patent_app_type] => utility [patent_app_number] => 10/507563 [patent_app_country] => US [patent_app_date] => 2002-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4536 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20050107997.pdf [firstpage_image] =>[orig_patent_app_number] => 10507563 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/507563
System and method for resource usage estimation Mar 13, 2002 Abandoned
Array ( [id] => 5909403 [patent_doc_number] => 20020143510 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'Integrated circuit I/O pad cell modeling' [patent_app_type] => new [patent_app_number] => 10/099754 [patent_app_country] => US [patent_app_date] => 2002-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7055 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0143/20020143510.pdf [firstpage_image] =>[orig_patent_app_number] => 10099754 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/099754
Integrated circuit I/O pad cell modeling Mar 13, 2002 Abandoned
Array ( [id] => 6707329 [patent_doc_number] => 20030154063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-14 [patent_title] => 'Active path extraction for HDL code' [patent_app_type] => new [patent_app_number] => 09/683739 [patent_app_country] => US [patent_app_date] => 2002-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 14509 [patent_no_of_claims] => 114 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 327 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20030154063.pdf [firstpage_image] =>[orig_patent_app_number] => 09683739 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/683739
Active path extraction for HDL code Feb 7, 2002 Abandoned
Array ( [id] => 522589 [patent_doc_number] => 07197439 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-27 [patent_title] => 'Method for modeling semiconductor device process' [patent_app_type] => utility [patent_app_number] => 10/059176 [patent_app_country] => US [patent_app_date] => 2002-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 5191 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/197/07197439.pdf [firstpage_image] =>[orig_patent_app_number] => 10059176 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/059176
Method for modeling semiconductor device process Jan 30, 2002 Issued
Array ( [id] => 5847485 [patent_doc_number] => 20020133325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-19 [patent_title] => 'Discrete event simulator' [patent_app_type] => new [patent_app_number] => 10/043847 [patent_app_country] => US [patent_app_date] => 2002-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 21110 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20020133325.pdf [firstpage_image] =>[orig_patent_app_number] => 10043847 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/043847
Discrete event simulator Jan 10, 2002 Abandoned
Array ( [id] => 6762556 [patent_doc_number] => 20030125918 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'VHDL technology library method for efficient customization of chip gate delays' [patent_app_type] => new [patent_app_number] => 10/038689 [patent_app_country] => US [patent_app_date] => 2002-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 8896 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20030125918.pdf [firstpage_image] =>[orig_patent_app_number] => 10038689 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/038689
VHDL technology library method for efficient customization of chip gate delays Jan 1, 2002 Abandoned
Array ( [id] => 5925054 [patent_doc_number] => 20020116167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-22 [patent_title] => 'Method for simulating mobility in an urban area' [patent_app_type] => new [patent_app_number] => 10/032810 [patent_app_country] => US [patent_app_date] => 2001-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7192 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0116/20020116167.pdf [firstpage_image] =>[orig_patent_app_number] => 10032810 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/032810
Method for simulating mobility in an urban area Dec 25, 2001 Abandoned
Array ( [id] => 5847498 [patent_doc_number] => 20020133329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-19 [patent_title] => 'Simulation program product, method and system utilizing a plurality of simulation-models' [patent_app_type] => new [patent_app_number] => 10/022876 [patent_app_country] => US [patent_app_date] => 2001-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 15922 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20020133329.pdf [firstpage_image] =>[orig_patent_app_number] => 10022876 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/022876
Simulation program product, method and system utilizing a plurality of simulation-models Dec 19, 2001 Abandoned
Array ( [id] => 6670054 [patent_doc_number] => 20030115038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-19 [patent_title] => 'Method and device for emulating electronic apparatus' [patent_app_type] => new [patent_app_number] => 10/025268 [patent_app_country] => US [patent_app_date] => 2001-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3069 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20030115038.pdf [firstpage_image] =>[orig_patent_app_number] => 10025268 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/025268
Method and device for emulating electronic apparatus Dec 17, 2001 Abandoned
Array ( [id] => 6669960 [patent_doc_number] => 20030114944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-19 [patent_title] => 'System and method for target-based compact modeling' [patent_app_type] => new [patent_app_number] => 10/023235 [patent_app_country] => US [patent_app_date] => 2001-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5373 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0114/20030114944.pdf [firstpage_image] =>[orig_patent_app_number] => 10023235 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/023235
System and method for target-based compact modeling Dec 16, 2001 Issued
Array ( [id] => 6766638 [patent_doc_number] => 20030101038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-29 [patent_title] => 'Centralized disablement of instrumentation events within a batch simulation farm network' [patent_app_type] => new [patent_app_number] => 09/997768 [patent_app_country] => US [patent_app_date] => 2001-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 63 [patent_figures_cnt] => 63 [patent_no_of_words] => 45213 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20030101038.pdf [firstpage_image] =>[orig_patent_app_number] => 09997768 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/997768
Centralized disablement of instrumentation events within a batch simulation farm network Nov 29, 2001 Issued
Array ( [id] => 675525 [patent_doc_number] => 07092869 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-15 [patent_title] => 'Memory address prediction under emulation' [patent_app_type] => utility [patent_app_number] => 09/992137 [patent_app_country] => US [patent_app_date] => 2001-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4151 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/092/07092869.pdf [firstpage_image] =>[orig_patent_app_number] => 09992137 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/992137
Memory address prediction under emulation Nov 13, 2001 Issued
Array ( [id] => 6862767 [patent_doc_number] => 20030093775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-15 [patent_title] => 'Processing of self-modifying code under emulation' [patent_app_type] => new [patent_app_number] => 09/992130 [patent_app_country] => US [patent_app_date] => 2001-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3792 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20030093775.pdf [firstpage_image] =>[orig_patent_app_number] => 09992130 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/992130
Processing of self-modifying code under emulation Nov 13, 2001 Abandoned
Array ( [id] => 6862766 [patent_doc_number] => 20030093774 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-15 [patent_title] => 'State-specific variants of translated code under emulation' [patent_app_type] => new [patent_app_number] => 09/992120 [patent_app_country] => US [patent_app_date] => 2001-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3884 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20030093774.pdf [firstpage_image] =>[orig_patent_app_number] => 09992120 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/992120
State-specific variants of translated code under emulation Nov 13, 2001 Abandoned
Array ( [id] => 414435 [patent_doc_number] => 07283941 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-16 [patent_title] => 'Computer system and method for modeling fluid depletion' [patent_app_type] => utility [patent_app_number] => 10/013743 [patent_app_country] => US [patent_app_date] => 2001-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 4029 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 317 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/283/07283941.pdf [firstpage_image] =>[orig_patent_app_number] => 10013743 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/013743
Computer system and method for modeling fluid depletion Nov 12, 2001 Issued
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