Search

Marc M. Duncan

Examiner (ID: 7953, Phone: (571)272-3646 , Office: P/2113 )

Most Active Art Unit
2113
Art Unit(s)
2113, 2184
Total Applications
1363
Issued Applications
1163
Pending Applications
82
Abandoned Applications
142

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12475035 [patent_doc_number] => 09990263 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-06-05 [patent_title] => Efficient use of spare device(s) associated with a group of devices [patent_app_type] => utility [patent_app_number] => 15/074501 [patent_app_country] => US [patent_app_date] => 2016-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9920 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15074501 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/074501
Efficient use of spare device(s) associated with a group of devices Mar 17, 2016 Issued
Array ( [id] => 11086353 [patent_doc_number] => 20160283319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-29 [patent_title] => 'DATA STORAGE DEVICE AND ENCODING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/074470 [patent_app_country] => US [patent_app_date] => 2016-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5210 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15074470 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/074470
DATA STORAGE DEVICE AND ENCODING METHOD THEREOF Mar 17, 2016 Abandoned
Array ( [id] => 13185695 [patent_doc_number] => 10108367 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-23 [patent_title] => Method for a source storage device sending data to a backup storage device for storage, and storage device [patent_app_type] => utility [patent_app_number] => 15/064890 [patent_app_country] => US [patent_app_date] => 2016-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 18081 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15064890 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/064890
Method for a source storage device sending data to a backup storage device for storage, and storage device Mar 8, 2016 Issued
Array ( [id] => 11577627 [patent_doc_number] => 09632888 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-25 [patent_title] => 'Memory data migration method and apparatus, and computer' [patent_app_type] => utility [patent_app_number] => 15/058100 [patent_app_country] => US [patent_app_date] => 2016-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 18913 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 315 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15058100 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/058100
Memory data migration method and apparatus, and computer Feb 29, 2016 Issued
Array ( [id] => 11938621 [patent_doc_number] => 20170242771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-24 [patent_title] => 'STORAGE CONTROLLER FAILOVER SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/048795 [patent_app_country] => US [patent_app_date] => 2016-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9554 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15048795 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/048795
Storage controller failover system Feb 18, 2016 Issued
Array ( [id] => 12351861 [patent_doc_number] => 09952795 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-24 [patent_title] => Page retirement in a NAND flash memory system [patent_app_type] => utility [patent_app_number] => 15/041246 [patent_app_country] => US [patent_app_date] => 2016-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 8036 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15041246 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/041246
Page retirement in a NAND flash memory system Feb 10, 2016 Issued
Array ( [id] => 12966814 [patent_doc_number] => 09875166 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-23 [patent_title] => Method for operating a data processing unit of a driver assistance system and data processing unit [patent_app_type] => utility [patent_app_number] => 15/019494 [patent_app_country] => US [patent_app_date] => 2016-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4968 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15019494 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/019494
Method for operating a data processing unit of a driver assistance system and data processing unit Feb 8, 2016 Issued
Array ( [id] => 11069997 [patent_doc_number] => 20160266960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-15 [patent_title] => 'INFORMATION PROCESSING APPARATUS AND KERNEL DUMP METHOD' [patent_app_type] => utility [patent_app_number] => 15/019310 [patent_app_country] => US [patent_app_date] => 2016-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7774 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15019310 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/019310
INFORMATION PROCESSING APPARATUS AND KERNEL DUMP METHOD Feb 8, 2016 Abandoned
Array ( [id] => 11085449 [patent_doc_number] => 20160282413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-29 [patent_title] => 'DEBUG CIRCUIT, SEMICONDUCTOR DEVICE, AND DEBUG METHOD' [patent_app_type] => utility [patent_app_number] => 15/019358 [patent_app_country] => US [patent_app_date] => 2016-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 10906 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15019358 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/019358
Debug circuit, semiconductor device, and debug method Feb 8, 2016 Issued
Array ( [id] => 13651449 [patent_doc_number] => 09852039 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-12-26 [patent_title] => Phase locked loop (PLL) timing device evaluation system and method for evaluating PLL timing devices [patent_app_type] => utility [patent_app_number] => 15/015094 [patent_app_country] => US [patent_app_date] => 2016-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7807 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15015094 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/015094
Phase locked loop (PLL) timing device evaluation system and method for evaluating PLL timing devices Feb 2, 2016 Issued
Array ( [id] => 11020096 [patent_doc_number] => 20160217049 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-28 [patent_title] => 'Fibre Channel Failover Based on Fabric Connectivity' [patent_app_type] => utility [patent_app_number] => 14/997435 [patent_app_country] => US [patent_app_date] => 2016-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8255 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14997435 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/997435
Fibre Channel Failover Based on Fabric Connectivity Jan 14, 2016 Abandoned
Array ( [id] => 11745735 [patent_doc_number] => 20170199808 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-13 [patent_title] => 'DEBUGGING A TRANSACTION IN A REPLICA EXECUTION ENVIRONMENT' [patent_app_type] => utility [patent_app_number] => 14/989895 [patent_app_country] => US [patent_app_date] => 2016-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5413 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14989895 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/989895
Debugging a transaction in a replica execution environment Jan 6, 2016 Issued
Array ( [id] => 12094155 [patent_doc_number] => 20170351249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-07 [patent_title] => 'REDUNDANT CONTROL SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/539468 [patent_app_country] => US [patent_app_date] => 2015-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2406 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15539468 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/539468
REDUNDANT CONTROL SYSTEM Dec 28, 2015 Abandoned
Array ( [id] => 13919763 [patent_doc_number] => 10204004 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-02-12 [patent_title] => Custom host errors definition service [patent_app_type] => utility [patent_app_number] => 14/980269 [patent_app_country] => US [patent_app_date] => 2015-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7378 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14980269 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/980269
Custom host errors definition service Dec 27, 2015 Issued
Array ( [id] => 12454269 [patent_doc_number] => 09983954 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-29 [patent_title] => High availability scheduler for scheduling searches of time stamped events [patent_app_type] => utility [patent_app_number] => 14/980700 [patent_app_country] => US [patent_app_date] => 2015-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 15650 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14980700 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/980700
High availability scheduler for scheduling searches of time stamped events Dec 27, 2015 Issued
Array ( [id] => 15012657 [patent_doc_number] => 10452473 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Methods for managing failure of a solid state device in a caching storage [patent_app_type] => utility [patent_app_number] => 14/976518 [patent_app_country] => US [patent_app_date] => 2015-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5525 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14976518 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/976518
Methods for managing failure of a solid state device in a caching storage Dec 20, 2015 Issued
Array ( [id] => 14952851 [patent_doc_number] => 10437690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-08 [patent_title] => Fault tolerant communication system [patent_app_type] => utility [patent_app_number] => 15/535726 [patent_app_country] => US [patent_app_date] => 2015-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3616 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15535726 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/535726
Fault tolerant communication system Dec 19, 2015 Issued
Array ( [id] => 11220563 [patent_doc_number] => 09448901 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-09-20 [patent_title] => 'Remote direct memory access for high availability nodes using a coherent accelerator processor interface' [patent_app_type] => utility [patent_app_number] => 14/969752 [patent_app_country] => US [patent_app_date] => 2015-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11570 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14969752 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/969752
Remote direct memory access for high availability nodes using a coherent accelerator processor interface Dec 14, 2015 Issued
Array ( [id] => 11693199 [patent_doc_number] => 20170168914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-15 [patent_title] => 'RULE-BASED ADAPTIVE MONITORING OF APPLICATION PERFORMANCE' [patent_app_type] => utility [patent_app_number] => 14/963939 [patent_app_country] => US [patent_app_date] => 2015-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9160 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14963939 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/963939
Rule-based adaptive monitoring of application performance Dec 8, 2015 Issued
Array ( [id] => 11672408 [patent_doc_number] => 20170161130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-08 [patent_title] => 'Computer Architecture and Method for Modifying Intake Data Rate Based on a Predictive Model' [patent_app_type] => utility [patent_app_number] => 14/963212 [patent_app_country] => US [patent_app_date] => 2015-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 19368 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14963212 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/963212
Computer architecture and method for modifying intake data rate based on a predictive model Dec 7, 2015 Issued
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