Search

Marc M. Duncan

Examiner (ID: 12323, Phone: (571)272-3646 , Office: P/2113 )

Most Active Art Unit
2113
Art Unit(s)
2113, 2184
Total Applications
1391
Issued Applications
1188
Pending Applications
70
Abandoned Applications
143

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8143535 [patent_doc_number] => 20120096314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'DYNAMIC DETECTION AND IDENTIFICATION OF THE FUNCTIONAL STATE OF MULTI-PROCESSOR CORES' [patent_app_type] => utility [patent_app_number] => 12/904205 [patent_app_country] => US [patent_app_date] => 2010-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7281 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20120096314.pdf [firstpage_image] =>[orig_patent_app_number] => 12904205 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/904205
Dynamic detection and identification of the functional state of multi-processor cores Oct 13, 2010 Issued
Array ( [id] => 6166861 [patent_doc_number] => 20110161781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'DIGITAL CONTENT DISTRIBUTION UTILIZING DISPERSED STORAGE' [patent_app_type] => utility [patent_app_number] => 12/903781 [patent_app_country] => US [patent_app_date] => 2010-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 21897 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20110161781.pdf [firstpage_image] =>[orig_patent_app_number] => 12903781 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/903781
Digital content distribution utilizing dispersed storage Oct 12, 2010 Issued
Array ( [id] => 8097985 [patent_doc_number] => 20120084601 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-05 [patent_title] => 'COMPUTER SYSTEM RESCUE METHOD' [patent_app_type] => utility [patent_app_number] => 12/894146 [patent_app_country] => US [patent_app_date] => 2010-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 4307 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20120084601.pdf [firstpage_image] =>[orig_patent_app_number] => 12894146 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/894146
COMPUTER SYSTEM RESCUE METHOD Sep 29, 2010 Abandoned
Array ( [id] => 8059103 [patent_doc_number] => 20120079291 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-29 [patent_title] => 'DATA BACKUP SYSTEM, STORAGE SYSTEM UTILIZING THE DATA BACKUP SYSTEM, DATA BACKUP METHOD AND COMPUTER READABLE MEDIUM FOR PERFORMING THE DATA BACKUP METHOD' [patent_app_type] => utility [patent_app_number] => 12/891809 [patent_app_country] => US [patent_app_date] => 2010-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1978 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20120079291.pdf [firstpage_image] =>[orig_patent_app_number] => 12891809 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/891809
DATA BACKUP SYSTEM, STORAGE SYSTEM UTILIZING THE DATA BACKUP SYSTEM, DATA BACKUP METHOD AND COMPUTER READABLE MEDIUM FOR PERFORMING THE DATA BACKUP METHOD Sep 27, 2010 Abandoned
Array ( [id] => 8046083 [patent_doc_number] => 20120072776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-22 [patent_title] => 'FAULT ISOLATION USING CODE PATHS' [patent_app_type] => utility [patent_app_number] => 12/885323 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8568 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20120072776.pdf [firstpage_image] =>[orig_patent_app_number] => 12885323 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/885323
Fault isolation using code paths Sep 16, 2010 Issued
Array ( [id] => 6634971 [patent_doc_number] => 20100325494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-23 [patent_title] => 'INFORMATION PROCESSING APPARATUS, PROCESS VERIFICATION SUPPORT METHOD, AND COMPUTER PRODUCT' [patent_app_type] => utility [patent_app_number] => 12/851735 [patent_app_country] => US [patent_app_date] => 2010-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4659 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0325/20100325494.pdf [firstpage_image] =>[orig_patent_app_number] => 12851735 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/851735
Information processing apparatus, process verification support method, and computer product Aug 5, 2010 Issued
Array ( [id] => 7770466 [patent_doc_number] => 20120036400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-09 [patent_title] => 'DATA PROCSSING SYSTEM WITH PERIPHERAL CONFIGURATION INFORMATION ERROR DETECTION' [patent_app_type] => utility [patent_app_number] => 12/851094 [patent_app_country] => US [patent_app_date] => 2010-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4860 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20120036400.pdf [firstpage_image] =>[orig_patent_app_number] => 12851094 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/851094
Data processing system with peripheral configuration information error detection Aug 4, 2010 Issued
Array ( [id] => 4577156 [patent_doc_number] => 07823009 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-10-26 [patent_title] => 'Fault tolerant distributed storage for cloud computing' [patent_app_type] => utility [patent_app_number] => 12/819799 [patent_app_country] => US [patent_app_date] => 2010-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10894 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/823/07823009.pdf [firstpage_image] =>[orig_patent_app_number] => 12819799 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/819799
Fault tolerant distributed storage for cloud computing Jun 20, 2010 Issued
Array ( [id] => 6529410 [patent_doc_number] => 20100217752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'DATA INTEGRITY VALIDATION IN STORAGE SYSTEMS' [patent_app_type] => utility [patent_app_number] => 12/777446 [patent_app_country] => US [patent_app_date] => 2010-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11331 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20100217752.pdf [firstpage_image] =>[orig_patent_app_number] => 12777446 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/777446
Data integrity validation in storage systems May 10, 2010 Issued
Array ( [id] => 8558243 [patent_doc_number] => 08332728 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-11 [patent_title] => 'Method and apparatus of generating a soft value for a memory device' [patent_app_type] => utility [patent_app_number] => 12/753746 [patent_app_country] => US [patent_app_date] => 2010-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 3252 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12753746 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/753746
Method and apparatus of generating a soft value for a memory device Apr 1, 2010 Issued
Array ( [id] => 9187189 [patent_doc_number] => 08627190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-07 [patent_title] => 'Memory device, circuit board, liquid receptacle, method of controlling a nonvolatile data memory section, and system including a memory device detachably connectable to a host circuit' [patent_app_type] => utility [patent_app_number] => 12/750859 [patent_app_country] => US [patent_app_date] => 2010-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 27951 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 353 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12750859 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/750859
Memory device, circuit board, liquid receptacle, method of controlling a nonvolatile data memory section, and system including a memory device detachably connectable to a host circuit Mar 30, 2010 Issued
Array ( [id] => 8959091 [patent_doc_number] => 08504885 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-06 [patent_title] => 'Methods and apparatus for approximating a probability density function or distribution for a received value in communication or storage systems' [patent_app_type] => utility [patent_app_number] => 12/751973 [patent_app_country] => US [patent_app_date] => 2010-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 12283 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12751973 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/751973
Methods and apparatus for approximating a probability density function or distribution for a received value in communication or storage systems Mar 30, 2010 Issued
Array ( [id] => 8787115 [patent_doc_number] => 08433970 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-30 [patent_title] => 'Techniques to control power consumption in an iterative decoder by control of node configurations' [patent_app_type] => utility [patent_app_number] => 12/751076 [patent_app_country] => US [patent_app_date] => 2010-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7707 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12751076 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/751076
Techniques to control power consumption in an iterative decoder by control of node configurations Mar 30, 2010 Issued
Array ( [id] => 7682502 [patent_doc_number] => 20100241909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'FAULT-TOLERANT SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/725147 [patent_app_country] => US [patent_app_date] => 2010-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4721 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20100241909.pdf [firstpage_image] =>[orig_patent_app_number] => 12725147 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/725147
Fault-tolerant system Mar 15, 2010 Issued
Array ( [id] => 7734663 [patent_doc_number] => 08103905 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-24 [patent_title] => 'Detecting and recovering from process failures' [patent_app_type] => utility [patent_app_number] => 12/722971 [patent_app_country] => US [patent_app_date] => 2010-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3226 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/103/08103905.pdf [firstpage_image] =>[orig_patent_app_number] => 12722971 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/722971
Detecting and recovering from process failures Mar 11, 2010 Issued
Array ( [id] => 8472766 [patent_doc_number] => 08301960 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-30 [patent_title] => 'Interleaving scheme for an LDPC coded 32 APSK system' [patent_app_type] => utility [patent_app_number] => 12/710276 [patent_app_country] => US [patent_app_date] => 2010-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 2631 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12710276 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/710276
Interleaving scheme for an LDPC coded 32 APSK system Feb 21, 2010 Issued
Array ( [id] => 4449016 [patent_doc_number] => 07865768 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-04 [patent_title] => 'Method and apparatus for seamless management for disaster recovery' [patent_app_type] => utility [patent_app_number] => 12/652408 [patent_app_country] => US [patent_app_date] => 2010-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 6435 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/865/07865768.pdf [firstpage_image] =>[orig_patent_app_number] => 12652408 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/652408
Method and apparatus for seamless management for disaster recovery Jan 4, 2010 Issued
Array ( [id] => 6533528 [patent_doc_number] => 20100218035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'Self-testing and -repairing fault-tolerance infrastructure for computer systems' [patent_app_type] => utility [patent_app_number] => 12/655511 [patent_app_country] => US [patent_app_date] => 2009-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12148 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20100218035.pdf [firstpage_image] =>[orig_patent_app_number] => 12655511 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/655511
Self-testing and -repairing fault-tolerance infrastructure for computer systems Dec 30, 2009 Abandoned
Array ( [id] => 6388504 [patent_doc_number] => 20100083044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'INFORMATION PROCESSING APPARATUS WITH RESUME FUNCTION AND INFORMATION PROCESSING SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/629183 [patent_app_country] => US [patent_app_date] => 2009-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 12069 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20100083044.pdf [firstpage_image] =>[orig_patent_app_number] => 12629183 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/629183
Information processing apparatus with resume function and information processing system Dec 1, 2009 Issued
Array ( [id] => 4631916 [patent_doc_number] => 08010826 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-30 [patent_title] => 'Reconfigurable circuit with redundant reconfigurable cluster(s)' [patent_app_type] => utility [patent_app_number] => 12/616682 [patent_app_country] => US [patent_app_date] => 2009-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5771 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 14 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/010/08010826.pdf [firstpage_image] =>[orig_patent_app_number] => 12616682 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/616682
Reconfigurable circuit with redundant reconfigurable cluster(s) Nov 10, 2009 Issued
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