| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 2762717
[patent_doc_number] => 05043732
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-08-27
[patent_title] => 'Analog-to-digital converter employing a pipeline multi-stage architecture'
[patent_app_type] => 1
[patent_app_number] => 7/555657
[patent_app_country] => US
[patent_app_date] => 1990-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2458
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/043/05043732.pdf
[firstpage_image] =>[orig_patent_app_number] => 555657
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/555657 | Analog-to-digital converter employing a pipeline multi-stage architecture | Jul 17, 1990 | Issued |
Array
(
[id] => 2720991
[patent_doc_number] => 05053771
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-10-01
[patent_title] => 'Adaptive dual range analog to digital converter'
[patent_app_type] => 1
[patent_app_number] => 7/553019
[patent_app_country] => US
[patent_app_date] => 1990-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 3942
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/053/05053771.pdf
[firstpage_image] =>[orig_patent_app_number] => 553019
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/553019 | Adaptive dual range analog to digital converter | Jul 15, 1990 | Issued |
Array
(
[id] => 2789779
[patent_doc_number] => 05164724
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-11-17
[patent_title] => 'Data format converters for use with digit-serial signals'
[patent_app_type] => 1
[patent_app_number] => 7/553914
[patent_app_country] => US
[patent_app_date] => 1990-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 29
[patent_no_of_words] => 17260
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/164/05164724.pdf
[firstpage_image] =>[orig_patent_app_number] => 553914
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/553914 | Data format converters for use with digit-serial signals | Jul 15, 1990 | Issued |
Array
(
[id] => 2796033
[patent_doc_number] => 05165058
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-11-17
[patent_title] => 'Voltage comparator with sample hold circuit'
[patent_app_type] => 1
[patent_app_number] => 7/548529
[patent_app_country] => US
[patent_app_date] => 1990-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 2183
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/165/05165058.pdf
[firstpage_image] =>[orig_patent_app_number] => 548529
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/548529 | Voltage comparator with sample hold circuit | Jul 4, 1990 | Issued |
Array
(
[id] => 2901511
[patent_doc_number] => 05184131
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-02-02
[patent_title] => 'A-D converter suitable for fuzzy controller'
[patent_app_type] => 1
[patent_app_number] => 7/540591
[patent_app_country] => US
[patent_app_date] => 1990-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 27
[patent_no_of_words] => 10188
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 237
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/184/05184131.pdf
[firstpage_image] =>[orig_patent_app_number] => 540591
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/540591 | A-D converter suitable for fuzzy controller | Jun 19, 1990 | Issued |
Array
(
[id] => 2676566
[patent_doc_number] => 05034742
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-07-23
[patent_title] => 'Message compression encoder and encoding method for a communication channel'
[patent_app_type] => 1
[patent_app_number] => 7/541115
[patent_app_country] => US
[patent_app_date] => 1990-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 12035
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 214
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/034/05034742.pdf
[firstpage_image] =>[orig_patent_app_number] => 541115
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/541115 | Message compression encoder and encoding method for a communication channel | Jun 18, 1990 | Issued |
Array
(
[id] => 2796117
[patent_doc_number] => 05136290
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-08-04
[patent_title] => 'Message expansion decoder and decoding method for a communication channel'
[patent_app_type] => 1
[patent_app_number] => 7/540024
[patent_app_country] => US
[patent_app_date] => 1990-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 12068
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 255
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/136/05136290.pdf
[firstpage_image] =>[orig_patent_app_number] => 540024
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/540024 | Message expansion decoder and decoding method for a communication channel | Jun 17, 1990 | Issued |
Array
(
[id] => 2712490
[patent_doc_number] => 05068657
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-11-26
[patent_title] => 'Method and apparatus for testing delta-sigma modulators'
[patent_app_type] => 1
[patent_app_number] => 7/528514
[patent_app_country] => US
[patent_app_date] => 1990-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 2888
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/068/05068657.pdf
[firstpage_image] =>[orig_patent_app_number] => 528514
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/528514 | Method and apparatus for testing delta-sigma modulators | May 24, 1990 | Issued |
Array
(
[id] => 2675849
[patent_doc_number] => 05047767
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-09-10
[patent_title] => 'Apparatus utilizing a four state encoder for encoding and decoding A sliding block (1,7) code'
[patent_app_type] => 1
[patent_app_number] => 7/526929
[patent_app_country] => US
[patent_app_date] => 1990-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 4290
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/047/05047767.pdf
[firstpage_image] =>[orig_patent_app_number] => 526929
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/526929 | Apparatus utilizing a four state encoder for encoding and decoding A sliding block (1,7) code | May 20, 1990 | Issued |
Array
(
[id] => 2817974
[patent_doc_number] => 05086299
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-02-04
[patent_title] => 'High speed analog-to-digital converter having a plurality of comparison cells which in successive steps determine the four most significant bits of the conversion and then the four least significant bits'
[patent_app_type] => 1
[patent_app_number] => 7/520724
[patent_app_country] => US
[patent_app_date] => 1990-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 1371
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/086/05086299.pdf
[firstpage_image] =>[orig_patent_app_number] => 520724
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/520724 | High speed analog-to-digital converter having a plurality of comparison cells which in successive steps determine the four most significant bits of the conversion and then the four least significant bits | May 8, 1990 | Issued |
Array
(
[id] => 2730604
[patent_doc_number] => 05057839
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-10-15
[patent_title] => 'Integratable switched-capacitor sigma-delta modulator'
[patent_app_type] => 1
[patent_app_number] => 7/520521
[patent_app_country] => US
[patent_app_date] => 1990-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 3212
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 229
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/057/05057839.pdf
[firstpage_image] =>[orig_patent_app_number] => 520521
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/520521 | Integratable switched-capacitor sigma-delta modulator | May 6, 1990 | Issued |
Array
(
[id] => 2755638
[patent_doc_number] => 05021787
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-06-04
[patent_title] => 'Digital-analog converter for conversion of law A- encoded digital signals into analog signals'
[patent_app_type] => 1
[patent_app_number] => 7/518375
[patent_app_country] => US
[patent_app_date] => 1990-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 3088
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 332
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/021/05021787.pdf
[firstpage_image] =>[orig_patent_app_number] => 518375
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/518375 | Digital-analog converter for conversion of law A- encoded digital signals into analog signals | May 2, 1990 | Issued |
Array
(
[id] => 2858139
[patent_doc_number] => 05134396
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-07-28
[patent_title] => 'Method and apparatus for encoding and decoding data utilizing data compression and neural networks'
[patent_app_type] => 1
[patent_app_number] => 7/514818
[patent_app_country] => US
[patent_app_date] => 1990-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 13
[patent_no_of_words] => 4094
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/134/05134396.pdf
[firstpage_image] =>[orig_patent_app_number] => 514818
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/514818 | Method and apparatus for encoding and decoding data utilizing data compression and neural networks | Apr 25, 1990 | Issued |
| 07/504623 | CODING/DECODING METHOD AND APPARATUS THEREFOR | Apr 3, 1990 | Abandoned |
Array
(
[id] => 2693652
[patent_doc_number] => 05049880
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-09-17
[patent_title] => 'Bit-wise run-length encoding for data compression'
[patent_app_type] => 1
[patent_app_number] => 7/503009
[patent_app_country] => US
[patent_app_date] => 1990-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 4330
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/049/05049880.pdf
[firstpage_image] =>[orig_patent_app_number] => 503009
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/503009 | Bit-wise run-length encoding for data compression | Apr 1, 1990 | Issued |
Array
(
[id] => 2688371
[patent_doc_number] => 05045852
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-09-03
[patent_title] => 'Dynamic model selection during data compression'
[patent_app_type] => 1
[patent_app_number] => 7/502909
[patent_app_country] => US
[patent_app_date] => 1990-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 6132
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/045/05045852.pdf
[firstpage_image] =>[orig_patent_app_number] => 502909
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/502909 | Dynamic model selection during data compression | Mar 29, 1990 | Issued |
| 07/499015 | INTERPOLATION DAC AND METHOD | Mar 25, 1990 | Issued |
| 07/498941 | DIGITAL NOISE SHAPING CIRCUIT WITH DIGITAL FEEDBACK | Mar 25, 1990 | Abandoned |
Array
(
[id] => 2857803
[patent_doc_number] => 05111380
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-05-05
[patent_title] => 'Controlled series-resonance-loaded inverter'
[patent_app_type] => 1
[patent_app_number] => 7/498484
[patent_app_country] => US
[patent_app_date] => 1990-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 4203
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 14
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/111/05111380.pdf
[firstpage_image] =>[orig_patent_app_number] => 498484
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/498484 | Controlled series-resonance-loaded inverter | Mar 22, 1990 | Issued |
Array
(
[id] => 2718585
[patent_doc_number] => 05010337
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-04-23
[patent_title] => 'High resolution D/A converter operable with single supply voltage'
[patent_app_type] => 1
[patent_app_number] => 7/493997
[patent_app_country] => US
[patent_app_date] => 1990-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 2386
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 198
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/010/05010337.pdf
[firstpage_image] =>[orig_patent_app_number] => 493997
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/493997 | High resolution D/A converter operable with single supply voltage | Mar 14, 1990 | Issued |