Search

Marcos D. Pizarro Crespo

Examiner (ID: 8349, Phone: (571)272-1716 , Office: P/2814 )

Most Active Art Unit
2814
Art Unit(s)
2814
Total Applications
1073
Issued Applications
704
Pending Applications
106
Abandoned Applications
293

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16402425 [patent_doc_number] => 20200343283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => IMAGE SENSOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/397464 [patent_app_country] => US [patent_app_date] => 2019-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5729 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16397464 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/397464
Image sensor structure and manufacturing method thereof Apr 28, 2019 Issued
Array ( [id] => 16820097 [patent_doc_number] => 11004936 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Silicon carbide insulated-gate power field effect transistor [patent_app_type] => utility [patent_app_number] => 16/397380 [patent_app_country] => US [patent_app_date] => 2019-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 42 [patent_no_of_words] => 12763 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16397380 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/397380
Silicon carbide insulated-gate power field effect transistor Apr 28, 2019 Issued
Array ( [id] => 16402480 [patent_doc_number] => 20200343338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => VERTICALLY STACKED FIN SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/397452 [patent_app_country] => US [patent_app_date] => 2019-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5973 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16397452 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/397452
Vertically stacked fin semiconductor devices Apr 28, 2019 Issued
Array ( [id] => 17381306 [patent_doc_number] => 11239339 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => Gate structure and method [patent_app_type] => utility [patent_app_number] => 16/397248 [patent_app_country] => US [patent_app_date] => 2019-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 44 [patent_no_of_words] => 7653 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16397248 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/397248
Gate structure and method Apr 28, 2019 Issued
Array ( [id] => 16202167 [patent_doc_number] => 10727348 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-28 [patent_title] => Semiconductor device with adjacent source/drain regions connected by a semiconductor bridge, and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 16/367813 [patent_app_country] => US [patent_app_date] => 2019-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 48 [patent_no_of_words] => 18532 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16367813 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/367813
Semiconductor device with adjacent source/drain regions connected by a semiconductor bridge, and method for fabricating the same Mar 27, 2019 Issued
Array ( [id] => 17210770 [patent_doc_number] => 11171147 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Flash memory with improved gate structure and a method of creating the same [patent_app_type] => utility [patent_app_number] => 16/359027 [patent_app_country] => US [patent_app_date] => 2019-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7101 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16359027 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/359027
Flash memory with improved gate structure and a method of creating the same Mar 19, 2019 Issued
Array ( [id] => 17210770 [patent_doc_number] => 11171147 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Flash memory with improved gate structure and a method of creating the same [patent_app_type] => utility [patent_app_number] => 16/359027 [patent_app_country] => US [patent_app_date] => 2019-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7101 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16359027 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/359027
Flash memory with improved gate structure and a method of creating the same Mar 19, 2019 Issued
Array ( [id] => 17210770 [patent_doc_number] => 11171147 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Flash memory with improved gate structure and a method of creating the same [patent_app_type] => utility [patent_app_number] => 16/359027 [patent_app_country] => US [patent_app_date] => 2019-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7101 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16359027 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/359027
Flash memory with improved gate structure and a method of creating the same Mar 19, 2019 Issued
Array ( [id] => 17210770 [patent_doc_number] => 11171147 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Flash memory with improved gate structure and a method of creating the same [patent_app_type] => utility [patent_app_number] => 16/359027 [patent_app_country] => US [patent_app_date] => 2019-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7101 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16359027 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/359027
Flash memory with improved gate structure and a method of creating the same Mar 19, 2019 Issued
Array ( [id] => 14382483 [patent_doc_number] => 20190165154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => FET TRANSISTOR ON A III-V MATERIAL STRUCTURE WITH SUBSTRATE TRANSFER [patent_app_type] => utility [patent_app_number] => 16/264255 [patent_app_country] => US [patent_app_date] => 2019-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4683 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16264255 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/264255
FET transistor on a III-V material structure with substrate transfer Jan 30, 2019 Issued
Array ( [id] => 18088589 [patent_doc_number] => 11538728 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-27 [patent_title] => Semiconductor package comprising a heat dissipation structure and an outer peripheral frame used as a resin flow barrier [patent_app_type] => utility [patent_app_number] => 16/759608 [patent_app_country] => US [patent_app_date] => 2018-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 8760 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16759608 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/759608
Semiconductor package comprising a heat dissipation structure and an outer peripheral frame used as a resin flow barrier Nov 29, 2018 Issued
Array ( [id] => 14110865 [patent_doc_number] => 20190097108 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => FLEXIBLE LIGHTING DEVICE INCLUDING A NANO-PARTICLE HEAT SPREADING LAYER [patent_app_type] => utility [patent_app_number] => 16/205795 [patent_app_country] => US [patent_app_date] => 2018-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17644 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16205795 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/205795
FLEXIBLE LIGHTING DEVICE INCLUDING A NANO-PARTICLE HEAT SPREADING LAYER Nov 29, 2018 Abandoned
Array ( [id] => 16660748 [patent_doc_number] => 20210057385 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => LOCKABLE SEMICONDUCTOR DIE, AN ELECTRONIC DEVICE INCLUDING LOCKABLE SEMICONDUCTOR DIES AND METHOD OF PRODUCTION [patent_app_type] => utility [patent_app_number] => 16/960349 [patent_app_country] => US [patent_app_date] => 2018-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4223 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16960349 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/960349
LOCKABLE SEMICONDUCTOR DIE, AN ELECTRONIC DEVICE INCLUDING LOCKABLE SEMICONDUCTOR DIES AND METHOD OF PRODUCTION Nov 19, 2018 Abandoned
Array ( [id] => 17908681 [patent_doc_number] => 11462544 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Array of recessed access gate lines [patent_app_type] => utility [patent_app_number] => 16/161381 [patent_app_country] => US [patent_app_date] => 2018-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 32 [patent_no_of_words] => 6869 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16161381 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/161381
Array of recessed access gate lines Oct 15, 2018 Issued
Array ( [id] => 17048181 [patent_doc_number] => 11101371 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-24 [patent_title] => Structure and method for vertical tunneling field effect transistor with leveled source and drain [patent_app_type] => utility [patent_app_number] => 16/160308 [patent_app_country] => US [patent_app_date] => 2018-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6865 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16160308 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/160308
Structure and method for vertical tunneling field effect transistor with leveled source and drain Oct 14, 2018 Issued
Array ( [id] => 13939671 [patent_doc_number] => 20190053351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-14 [patent_title] => Light-Emitting Device [patent_app_type] => utility [patent_app_number] => 16/157497 [patent_app_country] => US [patent_app_date] => 2018-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18299 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16157497 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/157497
Light-emitting device using organometallic complex having a pyrazine skeleton Oct 10, 2018 Issued
Array ( [id] => 17470190 [patent_doc_number] => 11276673 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-15 [patent_title] => Multi pixel LED packages [patent_app_type] => utility [patent_app_number] => 16/614360 [patent_app_country] => US [patent_app_date] => 2018-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 10656 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 333 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16614360 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/614360
Multi pixel LED packages Sep 12, 2018 Issued
Array ( [id] => 18608057 [patent_doc_number] => 11749535 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Semiconductor bonding structures and methods [patent_app_type] => utility [patent_app_number] => 16/046211 [patent_app_country] => US [patent_app_date] => 2018-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 4135 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16046211 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/046211
Semiconductor bonding structures and methods Jul 25, 2018 Issued
Array ( [id] => 17210460 [patent_doc_number] => 11170835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Field effect transistor constructions with gate insulator having local regions radially there-through that have different capacitance at different circumferential locations relative to a channel core periphery [patent_app_type] => utility [patent_app_number] => 16/011771 [patent_app_country] => US [patent_app_date] => 2018-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 6604 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16011771 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/011771
Field effect transistor constructions with gate insulator having local regions radially there-through that have different capacitance at different circumferential locations relative to a channel core periphery Jun 18, 2018 Issued
Array ( [id] => 13485625 [patent_doc_number] => 20180294355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-11 [patent_title] => HIGH VOLTAGE PMOS (HVPMOS) TRANSISTOR WITH A COMPOSITE DRIFT REGION AND MANUFACTURE METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/010002 [patent_app_country] => US [patent_app_date] => 2018-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4310 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16010002 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/010002
High voltage PMOS (HVPMOS) transistor with a composite drift region and manufacture method thereof Jun 14, 2018 Issued
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