Search

Marcos D. Pizarro Crespo

Examiner (ID: 8349, Phone: (571)272-1716 , Office: P/2814 )

Most Active Art Unit
2814
Art Unit(s)
2814
Total Applications
1073
Issued Applications
704
Pending Applications
106
Abandoned Applications
293

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10758676 [patent_doc_number] => 20160104828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-14 [patent_title] => 'LIGHT EMITTING DEVICE PACKAGE' [patent_app_type] => utility [patent_app_number] => 14/512148 [patent_app_country] => US [patent_app_date] => 2014-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5524 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14512148 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/512148
Light-emitting device package including lead frame and using lead terminal as a reflective cavity Oct 9, 2014 Issued
Array ( [id] => 14526085 [patent_doc_number] => 10340313 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-02 [patent_title] => Non-common capping layer on an organic device [patent_app_type] => utility [patent_app_number] => 14/507104 [patent_app_country] => US [patent_app_date] => 2014-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 18310 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 733 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14507104 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/507104
Non-common capping layer on an organic device Oct 5, 2014 Issued
Array ( [id] => 9901575 [patent_doc_number] => 20150056775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-26 [patent_title] => 'NON-VOLATILE MEMORY STRUCTURE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/505513 [patent_app_country] => US [patent_app_date] => 2014-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3255 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14505513 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/505513
Non-volatile memory device with undercut ONO trapping structure and manufacturing method thereof Oct 2, 2014 Issued
Array ( [id] => 9796575 [patent_doc_number] => 20150008519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-08 [patent_title] => 'POWER INTEGRATED DEVICE HAVING SURFACE CORRUGATIONS' [patent_app_type] => utility [patent_app_number] => 14/492243 [patent_app_country] => US [patent_app_date] => 2014-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4055 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14492243 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/492243
POWER INTEGRATED DEVICE HAVING SURFACE CORRUGATIONS Sep 21, 2014 Abandoned
Array ( [id] => 13242901 [patent_doc_number] => 10134659 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-20 [patent_title] => Semiconductor device with overlapped lead terminals [patent_app_type] => utility [patent_app_number] => 14/467016 [patent_app_country] => US [patent_app_date] => 2014-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 106 [patent_no_of_words] => 25140 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 338 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14467016 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/467016
Semiconductor device with overlapped lead terminals Aug 23, 2014 Issued
Array ( [id] => 10936631 [patent_doc_number] => 20140339652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-20 [patent_title] => 'SEMICONDUCTOR DEVICE WITH OXYGEN-CONTAINING METAL GATES' [patent_app_type] => utility [patent_app_number] => 14/449157 [patent_app_country] => US [patent_app_date] => 2014-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5612 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14449157 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/449157
SEMICONDUCTOR DEVICE WITH OXYGEN-CONTAINING METAL GATES Jul 31, 2014 Abandoned
Array ( [id] => 10943577 [patent_doc_number] => 20140346598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-27 [patent_title] => 'HIGH VOLTAGE PMOS (HVPMOS) TRANSISTOR WITH A COMPOSITE DRIFT REGION AND MANUFACTURE METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/277245 [patent_app_country] => US [patent_app_date] => 2014-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4504 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14277245 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/277245
HIGH VOLTAGE PMOS (HVPMOS) TRANSISTOR WITH A COMPOSITE DRIFT REGION AND MANUFACTURE METHOD THEREOF May 13, 2014 Abandoned
Array ( [id] => 10929909 [patent_doc_number] => 20140332930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-13 [patent_title] => 'INTEGRATED CIRCUIT DEVICE AND CONFIGURATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/270032 [patent_app_country] => US [patent_app_date] => 2014-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4595 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14270032 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/270032
Semiconductor package comprising stacked integrated circuit chips having connection terminals and through electrodes symmetrically arranged May 4, 2014 Issued
Array ( [id] => 10950761 [patent_doc_number] => 20140353783 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-04 [patent_title] => 'MAGNETIC MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 14/265697 [patent_app_country] => US [patent_app_date] => 2014-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9331 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14265697 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/265697
Magnetic tunnel junction memory devices including crystallized boron-including first magnetic layer on a tunnel barrier layer and lower boron-content second magnetic layer on the first magnetic layer Apr 29, 2014 Issued
Array ( [id] => 9928393 [patent_doc_number] => 20150076585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-19 [patent_title] => 'THREE-DIMENSIONAL NON-VOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/264407 [patent_app_country] => US [patent_app_date] => 2014-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 10716 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14264407 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/264407
Three-dimensional non-volatile memory device Apr 28, 2014 Issued
Array ( [id] => 11391820 [patent_doc_number] => 09553070 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-24 [patent_title] => '3D packages and methods for forming the same' [patent_app_type] => utility [patent_app_number] => 14/265278 [patent_app_country] => US [patent_app_date] => 2014-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 4102 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14265278 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/265278
3D packages and methods for forming the same Apr 28, 2014 Issued
Array ( [id] => 11660182 [patent_doc_number] => 09673195 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-06 [patent_title] => 'Semiconductor device having sufficient process margin and method of forming same' [patent_app_type] => utility [patent_app_number] => 14/264694 [patent_app_country] => US [patent_app_date] => 2014-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 33 [patent_no_of_words] => 6061 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14264694 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/264694
Semiconductor device having sufficient process margin and method of forming same Apr 28, 2014 Issued
Array ( [id] => 9855014 [patent_doc_number] => 20150035031 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-05 [patent_title] => 'MAGNETIC RANDOM ACCESS MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/264039 [patent_app_country] => US [patent_app_date] => 2014-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 43 [patent_no_of_words] => 8574 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14264039 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/264039
MAGNETIC RANDOM ACCESS MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME Apr 27, 2014 Abandoned
Array ( [id] => 10426419 [patent_doc_number] => 20150311430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-29 [patent_title] => 'MAGNETORESISTIVE SENSOR' [patent_app_type] => utility [patent_app_number] => 14/263146 [patent_app_country] => US [patent_app_date] => 2014-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4588 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14263146 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/263146
MAGNETORESISTIVE SENSOR Apr 27, 2014 Abandoned
Array ( [id] => 10426192 [patent_doc_number] => 20150311202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-29 [patent_title] => 'SEMICONDUCTOR CHIP' [patent_app_type] => utility [patent_app_number] => 14/262830 [patent_app_country] => US [patent_app_date] => 2014-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8137 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14262830 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/262830
Semiconductor chip having a circuit with cross-coupled transistors to thwart reverse engineering Apr 27, 2014 Issued
Array ( [id] => 11265995 [patent_doc_number] => 09490298 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-08 [patent_title] => 'Magnetic memory devices having a perpendicular magnetic tunnel junction' [patent_app_type] => utility [patent_app_number] => 14/264049 [patent_app_country] => US [patent_app_date] => 2014-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 10132 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14264049 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/264049
Magnetic memory devices having a perpendicular magnetic tunnel junction Apr 27, 2014 Issued
Array ( [id] => 12115194 [patent_doc_number] => 09871190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-16 [patent_title] => 'Magnetic random access memory with ultrathin reference layer' [patent_app_type] => utility [patent_app_number] => 14/263046 [patent_app_country] => US [patent_app_date] => 2014-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4854 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14263046 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/263046
Magnetic random access memory with ultrathin reference layer Apr 27, 2014 Issued
Array ( [id] => 10315277 [patent_doc_number] => 20150200281 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-16 [patent_title] => 'TRANSISTOR AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/262802 [patent_app_country] => US [patent_app_date] => 2014-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3574 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14262802 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/262802
Method for fabricating transistor having hard-mask layer Apr 26, 2014 Issued
Array ( [id] => 11489536 [patent_doc_number] => 09595611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-14 [patent_title] => 'FinFET with a single contact to multiple fins bridged together to form a source/drain region of the transistor' [patent_app_type] => utility [patent_app_number] => 14/262712 [patent_app_country] => US [patent_app_date] => 2014-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 48 [patent_no_of_words] => 19301 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14262712 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/262712
FinFET with a single contact to multiple fins bridged together to form a source/drain region of the transistor Apr 25, 2014 Issued
Array ( [id] => 16417823 [patent_doc_number] => 10825724 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-03 [patent_title] => Metal contact structure and method of forming the same in a semiconductor device [patent_app_type] => utility [patent_app_number] => 14/262467 [patent_app_country] => US [patent_app_date] => 2014-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3146 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14262467 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/262467
Metal contact structure and method of forming the same in a semiconductor device Apr 24, 2014 Issued
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