Search

Marcos D. Pizarro Crespo

Examiner (ID: 8349, Phone: (571)272-1716 , Office: P/2814 )

Most Active Art Unit
2814
Art Unit(s)
2814
Total Applications
1073
Issued Applications
704
Pending Applications
106
Abandoned Applications
293

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7036845 [patent_doc_number] => 20050156279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-21 [patent_title] => 'Capacitor and semiconductor device and method for fabricating the semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/059469 [patent_app_country] => US [patent_app_date] => 2005-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 41 [patent_no_of_words] => 16467 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20050156279.pdf [firstpage_image] =>[orig_patent_app_number] => 11059469 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/059469
Semiconductor device having passive component and support substrate with electrodes and through electrodes passing through support substrate Feb 15, 2005 Issued
Array ( [id] => 370160 [patent_doc_number] => 07476935 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-13 [patent_title] => 'High power semiconductor device having a schottky barrier diode' [patent_app_type] => utility [patent_app_number] => 11/054856 [patent_app_country] => US [patent_app_date] => 2005-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 6175 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/476/07476935.pdf [firstpage_image] =>[orig_patent_app_number] => 11054856 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/054856
High power semiconductor device having a schottky barrier diode Feb 9, 2005 Issued
Array ( [id] => 7176754 [patent_doc_number] => 20050189647 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-01 [patent_title] => 'Carbonaceous composite heat spreader and associated methods' [patent_app_type] => utility [patent_app_number] => 11/056339 [patent_app_country] => US [patent_app_date] => 2005-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6561 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20050189647.pdf [firstpage_image] =>[orig_patent_app_number] => 11056339 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/056339
Carbonaceous composite heat spreader and associated methods Feb 9, 2005 Abandoned
Array ( [id] => 394310 [patent_doc_number] => 07298009 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-20 [patent_title] => 'Semiconductor method and device with mixed orientation substrate' [patent_app_type] => utility [patent_app_number] => 11/047928 [patent_app_country] => US [patent_app_date] => 2005-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 17 [patent_no_of_words] => 3431 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/298/07298009.pdf [firstpage_image] =>[orig_patent_app_number] => 11047928 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/047928
Semiconductor method and device with mixed orientation substrate Jan 31, 2005 Issued
Array ( [id] => 874372 [patent_doc_number] => 07362403 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-22 [patent_title] => 'Liquid crystal display having gate driver IC chip COG-mounted on glass substrate' [patent_app_type] => utility [patent_app_number] => 11/045809 [patent_app_country] => US [patent_app_date] => 2005-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5858 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 439 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/362/07362403.pdf [firstpage_image] =>[orig_patent_app_number] => 11045809 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/045809
Liquid crystal display having gate driver IC chip COG-mounted on glass substrate Jan 27, 2005 Issued
Array ( [id] => 517940 [patent_doc_number] => 07189612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-13 [patent_title] => 'Ferroelectric memory and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/029355 [patent_app_country] => US [patent_app_date] => 2005-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 72 [patent_no_of_words] => 31778 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/189/07189612.pdf [firstpage_image] =>[orig_patent_app_number] => 11029355 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/029355
Ferroelectric memory and method for manufacturing the same Jan 5, 2005 Issued
Array ( [id] => 5629688 [patent_doc_number] => 20060146156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-06 [patent_title] => 'Method and apparatus for controlling charge transfer in CMOS sensors with a graded transfer gate work function' [patent_app_type] => utility [patent_app_number] => 11/026278 [patent_app_country] => US [patent_app_date] => 2004-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 8465 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0146/20060146156.pdf [firstpage_image] =>[orig_patent_app_number] => 11026278 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/026278
Method and apparatus for controlling charge transfer in CMOS sensors with a graded transfer-gate work-function Dec 29, 2004 Issued
Array ( [id] => 5629689 [patent_doc_number] => 20060146157 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-06 [patent_title] => 'Method and apparatus for controlling charge transfer in CMOS sensors with a transfer gate work function' [patent_app_type] => utility [patent_app_number] => 11/026582 [patent_app_country] => US [patent_app_date] => 2004-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 8506 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0146/20060146157.pdf [firstpage_image] =>[orig_patent_app_number] => 11026582 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/026582
Method and apparatus for controlling charge transfer in CMOS sensors with a transfer gate work function Dec 29, 2004 Issued
Array ( [id] => 6903494 [patent_doc_number] => 20050098889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-12 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/010339 [patent_app_country] => US [patent_app_date] => 2004-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3124 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20050098889.pdf [firstpage_image] =>[orig_patent_app_number] => 11010339 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/010339
Semiconductor device Dec 13, 2004 Issued
Array ( [id] => 303885 [patent_doc_number] => 07535025 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-19 [patent_title] => 'Structure and manufacturing method for a silicon carbide semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/003599 [patent_app_country] => US [patent_app_date] => 2004-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 93 [patent_no_of_words] => 35922 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/535/07535025.pdf [firstpage_image] =>[orig_patent_app_number] => 11003599 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/003599
Structure and manufacturing method for a silicon carbide semiconductor device Dec 5, 2004 Issued
Array ( [id] => 544189 [patent_doc_number] => 07163891 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-16 [patent_title] => 'High density DRAM with reduced peripheral device area and method of manufacture' [patent_app_type] => utility [patent_app_number] => 11/003592 [patent_app_country] => US [patent_app_date] => 2004-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 2733 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/163/07163891.pdf [firstpage_image] =>[orig_patent_app_number] => 11003592 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/003592
High density DRAM with reduced peripheral device area and method of manufacture Dec 2, 2004 Issued
Array ( [id] => 7094938 [patent_doc_number] => 20050127520 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-16 [patent_title] => 'Device package, a printed wiring board, and an electronic apparatus' [patent_app_type] => utility [patent_app_number] => 10/995308 [patent_app_country] => US [patent_app_date] => 2004-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4107 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20050127520.pdf [firstpage_image] =>[orig_patent_app_number] => 10995308 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/995308
Device package, a printed wiring board, and an electronic apparatus with efficiently spaced bottom electrodes including intervals between bottom electrodes of different lengths Nov 23, 2004 Issued
Array ( [id] => 7241853 [patent_doc_number] => 20050073008 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-07 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/993448 [patent_app_country] => US [patent_app_date] => 2004-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5132 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20050073008.pdf [firstpage_image] =>[orig_patent_app_number] => 10993448 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/993448
Semiconductor device Nov 21, 2004 Abandoned
Array ( [id] => 7116768 [patent_doc_number] => 20050070069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-31 [patent_title] => 'Raised-lines overlay semiconductor targets and method of making the same' [patent_app_type] => utility [patent_app_number] => 10/992549 [patent_app_country] => US [patent_app_date] => 2004-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4153 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20050070069.pdf [firstpage_image] =>[orig_patent_app_number] => 10992549 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/992549
Raised-lines overlay semiconductor targets and method of making the same Nov 17, 2004 Abandoned
Array ( [id] => 879792 [patent_doc_number] => 07354829 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-08 [patent_title] => 'Trench-gate transistor with ono gate dielectric and fabrication process therefor' [patent_app_type] => utility [patent_app_number] => 10/974838 [patent_app_country] => US [patent_app_date] => 2004-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 71 [patent_no_of_words] => 7886 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/354/07354829.pdf [firstpage_image] =>[orig_patent_app_number] => 10974838 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/974838
Trench-gate transistor with ono gate dielectric and fabrication process therefor Oct 27, 2004 Issued
Array ( [id] => 5741279 [patent_doc_number] => 20060087001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-27 [patent_title] => 'PROGRAMMABLE SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 10/904058 [patent_app_country] => US [patent_app_date] => 2004-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4392 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20060087001.pdf [firstpage_image] =>[orig_patent_app_number] => 10904058 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/904058
Programmable electronic fuse Oct 20, 2004 Issued
Array ( [id] => 757587 [patent_doc_number] => 07015077 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-03-21 [patent_title] => 'Varied trench depth for thyristor isolation' [patent_app_type] => utility [patent_app_number] => 10/970085 [patent_app_country] => US [patent_app_date] => 2004-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5538 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/015/07015077.pdf [firstpage_image] =>[orig_patent_app_number] => 10970085 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/970085
Varied trench depth for thyristor isolation Oct 20, 2004 Issued
Array ( [id] => 6949825 [patent_doc_number] => 20050224919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-13 [patent_title] => 'Spacer die structure and method for attaching' [patent_app_type] => utility [patent_app_number] => 10/959659 [patent_app_country] => US [patent_app_date] => 2004-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2330 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20050224919.pdf [firstpage_image] =>[orig_patent_app_number] => 10959659 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/959659
Spacer die structure and method for attaching Oct 5, 2004 Abandoned
Array ( [id] => 7127428 [patent_doc_number] => 20050059172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-17 [patent_title] => 'Fabrication method and structure for ferroelectric nonvolatile memory field effect transistor' [patent_app_type] => utility [patent_app_number] => 10/960219 [patent_app_country] => US [patent_app_date] => 2004-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 3135 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20050059172.pdf [firstpage_image] =>[orig_patent_app_number] => 10960219 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/960219
Ferroelectric memory transistor with highly-oriented film on gate insulator Oct 5, 2004 Issued
Array ( [id] => 9345490 [patent_doc_number] => 08664640 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-04 [patent_title] => 'Non-volatile memory device including semiconductor charge-trapping material particles' [patent_app_type] => utility [patent_app_number] => 10/958659 [patent_app_country] => US [patent_app_date] => 2004-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6326 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 10958659 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/958659
Non-volatile memory device including semiconductor charge-trapping material particles Oct 5, 2004 Issued
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