Search

Marcos D. Pizarro Crespo

Examiner (ID: 8349, Phone: (571)272-1716 , Office: P/2814 )

Most Active Art Unit
2814
Art Unit(s)
2814
Total Applications
1073
Issued Applications
704
Pending Applications
106
Abandoned Applications
293

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6768061 [patent_doc_number] => 20030214001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-20 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/463952 [patent_app_country] => US [patent_app_date] => 2003-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9160 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20030214001.pdf [firstpage_image] =>[orig_patent_app_number] => 10463952 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/463952
Semiconductor device and method for manufacturing the same Jun 17, 2003 Abandoned
Array ( [id] => 1037857 [patent_doc_number] => 06873009 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-29 [patent_title] => 'Vertical semiconductor device with tunnel insulator in current path controlled by gate electrode' [patent_app_type] => utility [patent_app_number] => 10/459621 [patent_app_country] => US [patent_app_date] => 2003-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 60 [patent_no_of_words] => 12463 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/873/06873009.pdf [firstpage_image] =>[orig_patent_app_number] => 10459621 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/459621
Vertical semiconductor device with tunnel insulator in current path controlled by gate electrode Jun 11, 2003 Issued
Array ( [id] => 7333988 [patent_doc_number] => 20040188715 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Reinforced material' [patent_app_type] => new [patent_app_number] => 10/460078 [patent_app_country] => US [patent_app_date] => 2003-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2915 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20040188715.pdf [firstpage_image] =>[orig_patent_app_number] => 10460078 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/460078
Reinforced material Jun 11, 2003 Abandoned
Array ( [id] => 790864 [patent_doc_number] => 06984888 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-10 [patent_title] => 'Carbonaceous composite heat spreader and associated methods' [patent_app_type] => utility [patent_app_number] => 10/453469 [patent_app_country] => US [patent_app_date] => 2003-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 11650 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/984/06984888.pdf [firstpage_image] =>[orig_patent_app_number] => 10453469 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/453469
Carbonaceous composite heat spreader and associated methods Jun 1, 2003 Issued
Array ( [id] => 6807323 [patent_doc_number] => 20030197262 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-23 [patent_title] => 'Dual-chip integrated circuit package and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/441778 [patent_app_country] => US [patent_app_date] => 2003-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4815 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20030197262.pdf [firstpage_image] =>[orig_patent_app_number] => 10441778 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/441778
Dual-chip integrated circuit package and method of manufacturing the same May 18, 2003 Issued
Array ( [id] => 696292 [patent_doc_number] => 07071537 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-04 [patent_title] => 'Power device having electrodes on a top surface thereof' [patent_app_type] => utility [patent_app_number] => 10/430569 [patent_app_country] => US [patent_app_date] => 2003-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 4969 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/071/07071537.pdf [firstpage_image] =>[orig_patent_app_number] => 10430569 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/430569
Power device having electrodes on a top surface thereof May 4, 2003 Issued
Array ( [id] => 525639 [patent_doc_number] => 07187008 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-06 [patent_title] => 'Semiconductor driver circuit, display device and method of adjusting brightness balance for display device' [patent_app_type] => utility [patent_app_number] => 10/423408 [patent_app_country] => US [patent_app_date] => 2003-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5621 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/187/07187008.pdf [firstpage_image] =>[orig_patent_app_number] => 10423408 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/423408
Semiconductor driver circuit, display device and method of adjusting brightness balance for display device Apr 24, 2003 Issued
Array ( [id] => 1073685 [patent_doc_number] => 06838350 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-04 [patent_title] => 'Triply implanted complementary bipolar transistors' [patent_app_type] => utility [patent_app_number] => 10/424004 [patent_app_country] => US [patent_app_date] => 2003-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 3866 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/838/06838350.pdf [firstpage_image] =>[orig_patent_app_number] => 10424004 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/424004
Triply implanted complementary bipolar transistors Apr 24, 2003 Issued
Array ( [id] => 6708943 [patent_doc_number] => 20030168692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-11 [patent_title] => 'Self-aligned dual-floating gate memory cell and method for manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/412293 [patent_app_country] => US [patent_app_date] => 2003-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2826 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0168/20030168692.pdf [firstpage_image] =>[orig_patent_app_number] => 10412293 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/412293
Self-aligned dual-floating gate memory cell and method for manufacturing the same Apr 13, 2003 Issued
Array ( [id] => 1002680 [patent_doc_number] => 06909137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-21 [patent_title] => 'Method of creating deep trench capacitor using a P+ metal electrode' [patent_app_type] => utility [patent_app_number] => 10/249406 [patent_app_country] => US [patent_app_date] => 2003-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 7403 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/909/06909137.pdf [firstpage_image] =>[orig_patent_app_number] => 10249406 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/249406
Method of creating deep trench capacitor using a P+ metal electrode Apr 6, 2003 Issued
Array ( [id] => 6768113 [patent_doc_number] => 20030214053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-20 [patent_title] => 'Tape carrier package and method of fabricating the same' [patent_app_type] => new [patent_app_number] => 10/407424 [patent_app_country] => US [patent_app_date] => 2003-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2290 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20030214053.pdf [firstpage_image] =>[orig_patent_app_number] => 10407424 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/407424
Tape carrier package and method of fabricating the same Apr 6, 2003 Issued
Array ( [id] => 7441601 [patent_doc_number] => 20040195621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-07 [patent_title] => 'ON CHIP DECAP TRENCH CAPACITOR (DTC) FOR ULTRA HIGH PERFORMANCE SILICON ON INSULATOR (SOI) SYSTEMS MICROPROCESSORS' [patent_app_type] => new [patent_app_number] => 10/249386 [patent_app_country] => US [patent_app_date] => 2003-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 2821 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20040195621.pdf [firstpage_image] =>[orig_patent_app_number] => 10249386 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/249386
On chip decap trench capacitor (DTC) for ultra high performance silicon on insulator (SOI) systems microprocessors Apr 2, 2003 Issued
Array ( [id] => 1153044 [patent_doc_number] => 06770934 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-03 [patent_title] => 'Flash memory device structure and manufacturing method thereof' [patent_app_type] => B1 [patent_app_number] => 10/249362 [patent_app_country] => US [patent_app_date] => 2003-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5043 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/770/06770934.pdf [firstpage_image] =>[orig_patent_app_number] => 10249362 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/249362
Flash memory device structure and manufacturing method thereof Apr 2, 2003 Issued
Array ( [id] => 7441003 [patent_doc_number] => 20040195563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-07 [patent_title] => 'Electrical detection of selected species' [patent_app_type] => new [patent_app_number] => 10/405398 [patent_app_country] => US [patent_app_date] => 2003-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5135 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20040195563.pdf [firstpage_image] =>[orig_patent_app_number] => 10405398 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/405398
Electrical detection of selected species Apr 1, 2003 Issued
Array ( [id] => 1066267 [patent_doc_number] => 06847095 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-25 [patent_title] => 'Variable reactor (varactor) with engineered capacitance-voltage characteristics' [patent_app_type] => utility [patent_app_number] => 10/405568 [patent_app_country] => US [patent_app_date] => 2003-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 4725 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/847/06847095.pdf [firstpage_image] =>[orig_patent_app_number] => 10405568 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/405568
Variable reactor (varactor) with engineered capacitance-voltage characteristics Mar 31, 2003 Issued
Array ( [id] => 7334134 [patent_doc_number] => 20040188781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Bump style MEMS switch' [patent_app_type] => new [patent_app_number] => 10/403738 [patent_app_country] => US [patent_app_date] => 2003-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1418 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20040188781.pdf [firstpage_image] =>[orig_patent_app_number] => 10403738 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/403738
Bump style MEMS switch Mar 30, 2003 Issued
Array ( [id] => 469707 [patent_doc_number] => 07233024 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-19 [patent_title] => 'Three-dimensional memory device incorporating segmented bit line memory array' [patent_app_type] => utility [patent_app_number] => 10/403752 [patent_app_country] => US [patent_app_date] => 2003-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 14539 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/233/07233024.pdf [firstpage_image] =>[orig_patent_app_number] => 10403752 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/403752
Three-dimensional memory device incorporating segmented bit line memory array Mar 30, 2003 Issued
Array ( [id] => 6727752 [patent_doc_number] => 20030183942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-02 [patent_title] => 'Semiconductor device having damascene interconnection structure that prevents void formation between interconnections' [patent_app_type] => new [patent_app_number] => 10/397369 [patent_app_country] => US [patent_app_date] => 2003-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3192 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20030183942.pdf [firstpage_image] =>[orig_patent_app_number] => 10397369 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/397369
Semiconductor device having damascene interconnection structure that prevents void formation between interconnections Mar 26, 2003 Issued
Array ( [id] => 7333921 [patent_doc_number] => 20040188694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Method of improving electroluminescent efficiency of a MOS device by etching a silicon substrate thereof' [patent_app_type] => new [patent_app_number] => 10/396448 [patent_app_country] => US [patent_app_date] => 2003-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3651 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20040188694.pdf [firstpage_image] =>[orig_patent_app_number] => 10396448 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/396448
Method of improving electroluminescent efficiency of a MOS device by etching a silicon substrate thereof Mar 25, 2003 Issued
Array ( [id] => 6727663 [patent_doc_number] => 20030183853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-02 [patent_title] => 'Polysilicon evaluating method, polysilicon inspection apparatus and method for preparation of thin film transistor' [patent_app_type] => new [patent_app_number] => 10/394223 [patent_app_country] => US [patent_app_date] => 2003-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 10280 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20030183853.pdf [firstpage_image] =>[orig_patent_app_number] => 10394223 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/394223
Polysilicon evaluating method, polysilicon inspection apparatus and method for preparation of thin film transistor Mar 23, 2003 Issued
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